RE: [PATCH 08/14] drm/i915/dp: Use the common downstream bw check in compute_bpc
"Kandpal, Suraj" <[email protected]> Mon, 3 Aug 2026 05:23:37 +0000
| Newsgroups | org.freedesktop.lists.intel-gfx,org.freedesktop.lists.intel-xe |
|---|---|
| Message-ID | <DS4PPFE901A304FC2263C67C39BF7E3B5E7E3D52@DS4PPFE901A304F.namprd11.prod.outlook.com> |
> Subject: [PATCH 08/14] drm/i915/dp: Use the common downstream bw check in > compute_bpc >=20 > Currently the FRL bandwidth check is only added for the mode_valid phase. > Add the check in the compute_config phase also, replacing the TMDS-only > check with the common function that checks for both TMDS and FRL. >=20 > Signed-off-by: Ankit Nautiyal <[email protected]> LGTM, Reviewed-by: Suraj Kandpal <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) >=20 > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index d2d330b6c39a..9396f118d154 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -1662,8 +1662,8 @@ static int intel_dp_hdmi_compute_bpc(struct > intel_dp *intel_dp, > for (; bpc >=3D 8; bpc -=3D 2) { > if (intel_hdmi_bpc_possible(crtc_state, bpc, > intel_dp_has_hdmi_sink(intel_dp)) > && > - intel_dp_tmds_clock_valid(intel_dp, clock, bpc, crtc_state- > >sink_format, > - respect_downstream_limits) =3D=3D > MODE_OK) > + intel_dp_hdmi_bw_valid(intel_dp, clock, bpc, crtc_state- > >sink_format, > + respect_downstream_limits) =3D=3D > MODE_OK) > return bpc; > } >=20 > -- > 2.50.1