RE: [PATCH 07/14] drm/i915/dp: Use FRL pair check for the DFP dotclock limit

"Kandpal, Suraj" <[email protected]> Mon, 3 Aug 2026 05:22:41 +0000
Newsgroups org.freedesktop.lists.intel-gfx,org.freedesktop.lists.intel-xe
Message-ID <DS4PPFE901A304F33C54E4649D1BD8EDC7BE3D52@DS4PPFE901A304F.namprd11.prod.outlook.com>
> Subject: [PATCH 07/14] drm/i915/dp: Use FRL pair check for the DFP dotclo=
ck
> limit
>=20
> intel_dp_mode_valid_downstream() uses the intel_dp_hdmi_sink_max_frl() to
> check if FRL is to be used, in order to skip the max dotclock limit for t=
he FRL
> cases.
>=20
> Instead, use the intel_dp_pcon_sink_support_frl() that check both sink an=
d the
> pcon's FRL capabilities.
>=20
> Signed-off-by: Ankit Nautiyal <[email protected]>

Check comments on patch 6

Regards,
Suraj Kandpal

> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>=20
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 6bf42128a81d..d2d330b6c39a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1237,7 +1237,7 @@ intel_dp_mode_valid_downstream(struct
> intel_connector *connector,
>  	struct intel_dp *intel_dp =3D intel_attached_dp(connector);
>  	int bpc =3D 8; /* Assume 8bpc for the DP++/HDMI/DVI TMDS/FRL bw
> check */
>=20
> -	if (!intel_dp_hdmi_sink_max_frl(intel_dp) &&
> +	if (!intel_dp_pcon_sink_support_frl(intel_dp) &&
>  	    intel_dp->dfp.max_dotclock &&
>  	    target_clock > intel_dp->dfp.max_dotclock)
>  		return MODE_CLOCK_HIGH;
> --
> 2.50.1