Re: [PATCH v2] drm/i915/dmabuf: avoid global wbinvd on dma-buf import

> +1

Agreed. Will send out a separate patch for that.

> The need for this flush is a bit unfortunate. In theory iomem can be
> mapped and wiped write-back, But I'm not sure how common that is...
> Random idea, would it make sense to insert a GPU CLFLUSH into the
> pipeline using MI_CLFLUSH (on hardware that supports it) or an
> uncached but coherent MOCS / GPU PAT setting dummy blit?

Agreed it's unfortunate. I'd like to keep this patch as the targeted fix
for avoiding the latencies added by wbinvd_on_all_cpus and look at
the GPU-side approach as a follow-up.

To make sure I chase the right thing: did you mean making imported
buffers GPU-coherent via PAT/MOCS so the GPU snoops and no acquire flush
is needed at all, or emitting a pipelined flush at submission time? A CPU
wbinvd/clflush and an MI/PIPE_CONTROL flush act on different caches, so I
want to be sure which direction you had in mind before reworking.

Thanks,
Krishna