[PATCH v3 1/8] RISC-V: setup_c: avoid clearing BSS twice

This commit duplicates what is already implemented for ARM(64)[1].
Currently setup_c() isn't called twice but might be in the future.

[1]: 11c389397c ("ARM: setup_c: avoid clearing BSS twice")

Signed-off-by: Stefan Kerkmann <[email protected]>
---
 arch/riscv/lib/setupc.S | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/lib/setupc.S b/arch/riscv/lib/setupc.S
index 423de4181e..5370e8a48e 100644
--- a/arch/riscv/lib/setupc.S
+++ b/arch/riscv/lib/setupc.S
@@ -10,13 +10,30 @@
  */
 .section .text.setup_c
 ENTRY(setup_c)
+	addi	sp, sp, -SZREG * 2
+	REG_S	ra, SZREG(sp)
+	lla	a0, bss_cleared
+	lw	a1, 0(a0)
+	bnez	a1, zeroed
 	lla	a0, __bss_start
 	li	a1, 0
 	lla	a2, __bss_stop
 	sub	a2, a2, a0
-	j	__memset
+	jal	__memset
+	lla	a0, bss_cleared
+	li	a1, 1
+	sw	a1, 0(a0)
+zeroed:
+	REG_L	ra, SZREG(sp)
+	addi	sp, sp, SZREG * 2
+	ret
 ENDPROC(setup_c)
 
+.section .data.bss_cleared
+.balign 4
+bss_cleared:
+	.word 	0
+
 /*
  * void relocate_to_adr(unsigned long targetadr)
  *

-- 
2.47.3