[PATCH v3 1/9] dt-bindings: phy: Document ST STM32MP25 USB2-FEMTO PHY

From: Pankaj Dev <[email protected]>

Document USB2 PHY for STM32MP25 USB2 controllers, which includes the
USB2.0 host-only controller and USB 2.0 part of the DWC3 controller.
Two such PHYs in total are present in STM32MP25 SoC, they both are
slightly different, therefore they use different compatible string
to discern them.

Signed-off-by: Pankaj Dev <[email protected]>
Co-developed-by: Rahul Kumar <[email protected]>
Signed-off-by: Rahul Kumar <[email protected]>
Co-developed-by: Fabrice Gasnier <[email protected]>
Signed-off-by: Fabrice Gasnier <[email protected]>
Co-developed-by: Clément Le Goffic <[email protected]>
Signed-off-by: Clément Le Goffic <[email protected]>
Co-developed-by: Marek Vasut <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
---
Cc: Alexandre Torgue <[email protected]>
Cc: Christian Bruel <[email protected]>
Cc: Conor Dooley <[email protected]>
Cc: Fabrice Gasnier <[email protected]>
Cc: Greg Kroah-Hartman <[email protected]>
Cc: Krzysztof Kozlowski <[email protected]>
Cc: Maxime Coquelin <[email protected]>
Cc: Neil Armstrong <[email protected]>
Cc: Pankaj Dev <[email protected]>
Cc: Rahul Kumar <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Rosen Penev <[email protected]>
Cc: Thinh Nguyen <[email protected]>
Cc: Vinod Koul <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
---
V2: - Fix up Sob/Cdb lines
    - Fix up compatible string in example
    - Use additionalProperties: false
    - Expand description:
    - Use clock-cells = <1> to discern OSC and future PLL clock from the PHY
V3: - Move clock-cells next to PHY cells
    - Fix the bindings
    - Fix up Sob/Cdb lines further
---
 .../bindings/phy/st,stm32-usb2phy.yaml        | 67 +++++++++++++++++++
 1 file changed, 67 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/st,stm32-usb2phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/st,stm32-usb2phy.yaml b/Documentation/devicetree/bindings/phy/st,stm32-usb2phy.yaml
new file mode 100644
index 0000000000000..cc5044790beea
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/st,stm32-usb2phy.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/st,stm32-usb2phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics STM32 MPU High-Speed USB PHY
+
+description:
+  USB2 PHY block in STM32 is attached to USB 2.0 Host controller and
+  USB 2.0 side of DWC3 DRD controller, and provides the USB LS/FS/HS
+  connectivity. Both PHYs are the FEMTO-PHY, but their configuration
+  bits in the system control register are different for each variant.
+
+maintainers:
+  - Fabrice Gasnier <[email protected]>
+  - Marek Vasut <[email protected]>
+  - Pankaj Dev <[email protected]>
+
+properties:
+  compatible:
+    enum:
+      - st,stm32mp25-usb2phy1
+      - st,stm32mp25-usb2phy2
+
+  "#clock-cells":
+    const: 1
+
+  "#phy-cells":
+    const: 0
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  resets:
+    maxItems: 1
+
+  vdd33-supply:
+    description: Phandle to regulator providing 3V3 power supply to the USB2 HS PHY
+
+required:
+  - compatible
+  - "#clock-cells"
+  - "#phy-cells"
+  - clocks
+  - resets
+  - vdd33-supply
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/st,stm32mp25-rcc.h>
+    #include <dt-bindings/reset/st,stm32mp25-rcc.h>
+
+    usb-phy@2400 {
+        compatible = "st,stm32mp25-usb2phy1";
+        reg = <0x2400 0x24>;
+        #phy-cells = <0>;
+        #clock-cells = <1>;
+        clocks = <&rcc CK_KER_USB2PHY1>;
+        resets = <&rcc USB2PHY1_R>;
+        vdd33-supply = <&vdd33usb>;
+    };
-- 
2.53.0


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