Re: [PATCH v3 2/6] lib: sbi: Add Smrnmi extension macros for registers and bits

Nylon Chen <[email protected]>
Newsgroups org.infradead.lists.opensbi
Message-ID <CAHh=Yk_zsAkodPEReLS7ie_pA8KB=35UuZbmCvnqc+7HD-FD+g@mail.gmail.com>
Evgeny Voevodin <[email protected]> 於 2026年5月8日週五 上午2:08寫道:
>
> Add CSR definitions (MNSCRATCH, MNSTATUS, MNEPC, MNCAUSE) and bit definitions
> (MNSTATUS_NMIE, MNSTATUS_MNPV, MNSTATUS_MNPP). Also add SBI_HART_EXT_SMRNMI to
> the hart extension enumeration.
>
> Signed-off-by: Evgeny Voevodin <[email protected]>
> Reviewed-by: Anup Patel <[email protected]>
> ---
>  include/sbi/riscv_encoding.h | 10 ++++++++++
>  include/sbi/sbi_hart.h       |  2 ++
>  lib/sbi/sbi_hart.c           |  1 +
>  3 files changed, 13 insertions(+)
>
> diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
> index 3c1d5256..18f7b4a7 100644
> --- a/include/sbi/riscv_encoding.h
> +++ b/include/sbi/riscv_encoding.h
> @@ -215,6 +215,10 @@
>
>  #endif
>
> +#define MNSTATUS_NMIE                  (_UL(0x8))
> +#define MNSTATUS_MNPV                  (_UL(0x80))
> +#define MNSTATUS_MNPP                  (_UL(0x1800))
Please add define fo mnstatus.MNPELP bit as well.
> +
>  #define MHPMEVENT_SSCOF_MASK           _ULL(0xFF00000000000000)
>
>  #define ENVCFG_STCE                    (_ULL(1) << 63)
> @@ -830,6 +834,12 @@
>  #define CSR_CUSTOM10_M_RO_BASE         0xFC0
>  #define CSR_CUSTOM10_M_RO_COUNT                0x040
>
> +/* Smrnmi extension registers */
> +#define CSR_MNSCRATCH                          0x740
> +#define CSR_MNEPC                                      0x741
> +#define CSR_MNCAUSE                                    0x742
> +#define CSR_MNSTATUS                           0x744
> +
>  /* ===== Trap/Exception Causes ===== */
>
>  #define CAUSE_MISALIGNED_FETCH         0x0
> diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
> index a788b34c..937cdf29 100644
> --- a/include/sbi/sbi_hart.h
> +++ b/include/sbi/sbi_hart.h
> @@ -87,6 +87,8 @@ enum sbi_hart_extensions {
>         SBI_HART_EXT_XSIFIVE_CFLUSH_D_L1,
>         /** Hart has Xsfcease extension */
>         SBI_HART_EXT_XSIFIVE_CEASE,
> +       /** Hart has Smrnmi extension */
> +       SBI_HART_EXT_SMRNMI,
>
>         /** Maximum index of Hart extension */
>         SBI_HART_EXT_MAX,
> diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
> index 99e13990..4aefb759 100644
> --- a/lib/sbi/sbi_hart.c
> +++ b/lib/sbi/sbi_hart.c
> @@ -396,6 +396,7 @@ const struct sbi_hart_ext_data sbi_hart_ext[] = {
>         __SBI_HART_EXT_DATA(ssstateen, SBI_HART_EXT_SSSTATEEN),
>         __SBI_HART_EXT_DATA(xsfcflushdlone, SBI_HART_EXT_XSIFIVE_CFLUSH_D_L1),
>         __SBI_HART_EXT_DATA(xsfcease, SBI_HART_EXT_XSIFIVE_CEASE),
> +       __SBI_HART_EXT_DATA(smrnmi, SBI_HART_EXT_SMRNMI),
>  };
>
>  _Static_assert(SBI_HART_EXT_MAX == array_size(sbi_hart_ext),
> --
> 2.43.0
>
Otherwise, LGTM

Reviewed-by: Nylon Chen <[email protected]>

Regards,
Nylon

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