[MODERATED] Re: [SUSPECTED SPAM][PATCH v3 2/6] PERFv3

On Fri, Feb 08, 2019 at 10:01:47AM +0100, Peter Zijlstra wrote:
> On Fri, Feb 08, 2019 at 12:51:01AM +0000, speck for Andrew Cooper wrote:
> > On 07/02/2019 23:41, speck for Andi Kleen wrote:
> > > This patch assumes that the kernel is using
> > > RETPOLINE (or IBRS), otherwise speculative execution could
> > > still corrupt counter 3 in very unlikely cases.
> > 
> > What has the kernel configuration got to do with it?
> > 
> > It is my understanding that any execution of an XBEGIN instruction, even
> > speculatively, even in userspace will result in PCR3 getting modified.
> > 
> > A CPU either has force abort mode active, or PCR3 can be changed behind
> > the kernel's back.
> 
> We are executing kernel code; therefore any user RTM will have aborted
> and is irrelevant.
> 
> So what the kernel does is:
> 
> 	/*
> 	 * And as noted; userspace transactions will be aborted by
> 	 * having entered the kernel. The kernel does not use RTM
> 	 * itself.
> 	 */
> 
> 
> 	/*
> 	 * stops all counters; irrespective of ucode using PMC3 or not
> 	 */
> 	GLOBAL_CTRL = 0;
> 
> 	/*
> 	 * program PMC3
> 	 */
> 	CTRVAL3 = x;
> 	EVTSEL3 = y;
> 
> 	/*
> 	 * Set the TFA bit to make ucode not touch PMC3; since there has
> 	 * not been an RTM instruction between GLOBAL_CTRL=0 and here,
> 	 * PMC3 will still be {x,y} as we just wrote.
> 	 *
> 	 * This is what requires RETPOLINE/IBRS; because otherwise
> 	 * speculation could see a partial kernel instruction that looks
> 	 * like RTM, which would mess things up.
> 	 */
> 	WRMSR(MSR_TFA, 1);
> 
> 	/*
> 	 * Let 'er rip.
> 	 */
> 	GLOBAL_CTRL = ~0ULL;

Ah, I think I found a way to avoid having to rely on this. Let me try.