[MODERATED] Re: [PATCH v7 01/10] TAAv7 1

On Mon, Oct 21, 2019 at 01:23:02PM -0700, speck for Pawan Gupta wrote:
> From: Pawan Gupta <[email protected]>
> Subject: [PATCH v7 01/10] x86/tsx: Add enumeration support for IA32_TSX_CTRL
>  MSR
> 
> Transactional Synchronization Extensions (TSX) may be used on certain
> processors as part of a speculative side channel attack.  A microcode
> update for existing processors that are vulnerable to this attack will
> add a new MSR, IA32_TSX_CTRL to allow the system administrator the
> option to disable TSX as one of the possible mitigations.  [Note that
> future processors that are not vulnerable will also support the
> IA32_TSX_CTRL MSR].

This should clarify that not *all* TAA-vulnerable CPUs will get
IA32_TSX_CTRL, instead only the ones which aren't vulnerable to MDS.

-- 
Josh