[MODERATED] Re: ***UNCHECKED*** Re: [PATCH v5 08/11] TAAv5 8

On Tue, 15 Oct 2019, speck for Jiri Kosina wrote:

> > Maybe I'm missing something.  Isn't there going to be a ucode update for
> > MDS_NO parts, which does the verw buffer clearing?  In that case there's
> > no need to disable TSX, and instead the verw mitigation could be used,
> > if desired.
> 
> My understanding was that MDS_NO CPUs will only get ucode update that 
> exposes TSX control MSR, and nothing else.
> 
> > AFAICT, the patch allows to set the default to tsx=auto, which disables 
> > TSX on *all* vulnerable parts, not just the MDS_NO ones.  I don't see 
> > how that would prevent user regressions.
> > 
> > It sounds like maybe you're suggesting something else, that TSX should
> > only be disabled on vulnerable MDS_NO parts?
> 
> OK, let me take a look at the code again. I definitely thought that's what 
> 'auto' indeed does.

OK, so you are right and I misunderstood the logic in the code, sorry. 

Then the only purpose of 'auto' really is getting TSX enabled on future 
CPUs which would eventually have ARCH_CAP_TAA_NO=1; so pretty useless for 
preventing regressions.

So yeah, I agree, 'auto' is actually useless to prevent regressions, and I 
believe we want some other 'auto' (*), which would actually disable TSX 
only if (X86_BUG_TAA && !MD_CLEAR), agreed?

(*) I'd actually prefer to convert the current 'auto' to this new 
    semantics; it'll keep TSX enabled on future CPUs without X86_BUG_TAA,
    and it'll prevent regressions in unnecessary cases.

Thanks,

-- 
Jiri Kosina
SUSE Labs