[MODERATED] Re: [PATCH 3/9] TAA 3
Andrew Cooper <[email protected]>
| Newsgroups | org.kernel.lore.historical-speck |
|---|---|
| Message-ID | <[email protected]> |
On 23/10/2019 10:01, speck for Pawan Gupta wrote:
> + if (tsx_ctrl_state == TSX_CTRL_DISABLE) {
> + tsx_disable();
> +
> + /*
> + * tsx_disable() will change the state of the
> + * RTM CPUID bit. Clear it here since it is now
> + * expected to be not set.
> + */
> + setup_clear_cpu_cap(X86_FEATURE_RTM);
This same argument applies to HLE, and it would be weird for
pre-TSX_CTRL CPUs with tsx=off to report HLE but not RTM in /proc/cpuid
Furthermore, while grepping through the tree, I found
events/intel/lbr.c-267-static inline bool
lbr_from_signext_quirk_needed(void)
events/intel/lbr.c-268-{
events/intel/lbr.c-269- int lbr_format = x86_pmu.intel_cap.lbr_format;
events/intel/lbr.c:270: bool tsx_support = boot_cpu_has(X86_FEATURE_HLE) ||
events/intel/lbr.c-271- boot_cpu_has(X86_FEATURE_RTM);
events/intel/lbr.c-272-
events/intel/lbr.c-273- return !tsx_support && (lbr_desc[lbr_format] &
LBR_TSX);
which is going to need an adjustment to avoid applying the quirks on
non-broken hardware.
~Andrew