Re: [PATCH] KVM: Qemu: Flush i-cache after ide-dma operation in IA64
Avi Kivity <[email protected]>
| Newsgroups | org.kernel.vger.kvm-ia64,org.kernel.vger.kvm |
|---|---|
| Message-ID | <[email protected]> |
[email protected] wrote: > >> What about smp? >> > > fc will broadcast to the coherence domain the cache invalidation. So it is > SMP-ready for usual machines. > > Interesting. >> I'm surprised the guest doesn't do this by itself? >> > > It doesn't had to do it. The PCI transaction will automatically invalidate > caches - but qemu doesn't emulate this (and doesn't need to do on x86). > So any DMA on ia64 will flush the instruction caches?! -- error compiling committee.c: too many arguments to function