Re: [PATCH] KVM: Qemu: Flush i-cache after ide-dma operation in IA64

Avi Kivity wrote:
>>>  
>>
>> It doesn't had to do it.  The PCI transaction will automatically 
>> invalidate
>> caches - but qemu doesn't emulate this (and doesn't need to do on x86).
>>   
>
> So any DMA on ia64 will flush the instruction caches?!
>

Or maybe, the host kernel will do it after the transaction completes?  
In our case the lack of zero-copy means the host is invalidating the 
wrong addresses (memcpy source) and leaving the real destination intact.

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