[PATCH 2/3] arm64: dts: qcom: kodiak: mark PCIe root port as bridge
Rahul Samana <[email protected]>
| Newsgroups | org.kernel.vger.linux-bluetooth,org.kernel.vger.linux-arm-msm,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <20260723-rb3-industrial-bt-uart-v1-2-3c8e580c09d1@oss.qualcomm.com> |
Add the PCI class compatible to pcie0_port so child nodes below the PCI bridge can be matched against the enumerated PCI topology. This is needed by the M.2 E-key graph description used by the RB3 Gen 2 Industrial mezzanine Bluetooth UART overlay. Signed-off-by: Rahul Samana <[email protected]> --- arch/arm64/boot/dts/qcom/kodiak.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qcom/kodiak.dtsi index fa540d8c2615..12594967d2c2 100644 --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi @@ -2296,6 +2296,7 @@ pcie0: pcie@1c00000 { status = "disabled"; pcie0_port: pcie@0 { + compatible = "pciclass,0604"; device_type = "pci"; reg = <0x0 0x0 0x0 0x0 0x0>; bus-range = <0x01 0xff>; -- 2.34.1