Re: [PATCH v9 12/36] pinctrl: airoha: fix AN7583 MDIO pin mux config

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The newly added `mdio1` pingroup is exposed to the pin control framework but is entirely unusable for pin multiplexing because it is not mapped to any function.
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--- Patch [12]: [PATCH v9 12/36] pinctrl: airoha: fix AN7583 MDIO pin mux config ---
commit 0c3820088ec10b5bbb9e1c12cf81f5aa308d9ff7
Author: Daniel Schwierzeck <[email protected]>

pinctrl: airoha: fix AN7583 MDIO pin mux config

This commit corrects the AN7583 MDIO pin mux configuration by updating the
pins array to point to pins 53 and 54 instead of 43 and 44. It also updates
the MDIO function group to clear the correct hardware initialization bits in
the PON mode register.

> diff --git a/drivers/pinctrl/airoha/pinctrl-airoha.c b/drivers/pinctrl/airoha/pinctrl-airoha.c
> --- a/drivers/pinctrl/airoha/pinctrl-airoha.c
> +++ b/drivers/pinctrl/airoha/pinctrl-airoha.c
> @@ -724,7 +724,8 @@ static const int an7583_pon_tod_1pps_pins[] = { 32 };
>  static const int an7583_gsw_tod_1pps_pins[] = { 32 };
>  static const int an7583_sipo_pins[] = { 34, 35 };
>  static const int an7583_sipo_rclk_pins[] = { 34, 35, 33 };
> -static const int an7583_mdio_pins[] = { 43, 44 };
> +static const int an7583_mdio_pins[] = { 53, 54 };
> +static const int an7583_mdio1_pins[] = { 43, 44 };
>  static const int an7583_uart2_pins[] = { 34, 35 };
>  static const int an7583_uart2_cts_rts_pins[] = { 32, 33 };
>  static const int an7583_hsuart_pins[] = { 30, 31 };

[ ... ]

> @@ -809,6 +810,7 @@ static const struct pingroup an7583_pinctrl_groups[] = {
>  	PINCTRL_PIN_GROUP("sipo", an7583_sipo),
>  	PINCTRL_PIN_GROUP("sipo_rclk", an7583_sipo_rclk),
>  	PINCTRL_PIN_GROUP("mdio", an7583_mdio),
> +	PINCTRL_PIN_GROUP("mdio1", an7583_mdio1),

[Severity: Low]
Are these new pins intended to be mapped to a function?

The new mdio1 group is registered with the pin control framework but does
not appear to be mapped to any function in the driver's function array. If
a device tree attempts to configure a function for this group, the pinctrl
core will reject it with -EINVAL.

Since pins 43 and 44 are already covered by the i2c1 group as mentioned in
the commit message, is this mdio1 pingroup leftover cruft that can be
safely removed?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=12