Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The newly added `mdio1` pin group is orphaned because it lacks a corresponding pinmux function mapping, making it unusable dead code.
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--- Patch [24]: [PATCH v9 24/36] pinctrl: airoha: split driver on shared code and SoC specific drivers ---
commit 183c2af4d64e75f7c6e2fd8f6310a303940ea68d
Author: Mikhail Kshevetskiy <[email protected]>
pinctrl: airoha: split driver on shared code and SoC specific drivers
This commit splits the combined an7581/an7583 source file into shared pinctrl
code and SoC specific drivers.
> diff --git a/drivers/pinctrl/airoha/pinctrl-an7583.c b/drivers/pinctrl/airoha/pinctrl-an7583.c
> new file mode 100644
> --- /dev/null
> +++ b/drivers/pinctrl/airoha/pinctrl-an7583.c
[ ... ]
> +static const int an7583_sipo_pins[] = { 34, 35 };
> +static const int an7583_sipo_rclk_pins[] = { 34, 35, 33 };
> +static const int an7583_mdio_pins[] = { 53, 54 };
> +static const int an7583_mdio1_pins[] = { 43, 44 };
> +static const int an7583_uart2_pins[] = { 34, 35 };
[ ... ]
> +static const struct pingroup an7583_pinctrl_groups[] = {
> + PINCTRL_PIN_GROUP("pon", an7583_pon),
> + PINCTRL_PIN_GROUP("pon_tod_1pps", an7583_pon_tod_1pps),
> + PINCTRL_PIN_GROUP("gsw_tod_1pps", an7583_gsw_tod_1pps),
> + PINCTRL_PIN_GROUP("sipo", an7583_sipo),
> + PINCTRL_PIN_GROUP("sipo_rclk", an7583_sipo_rclk),
> + PINCTRL_PIN_GROUP("mdio", an7583_mdio),
> + PINCTRL_PIN_GROUP("mdio1", an7583_mdio1),
[Severity: Low]
Is this mdio1 pin group an unintentional leftover?
It is defined and added to the group list here, but it lacks a corresponding
pinmux function mapping in an7583_pinctrl_funcs, meaning it cannot be
referenced by device tree pinmux setups. Additionally, pins 43 and 44 are
already assigned to an7583_i2c1_pins.
> + PINCTRL_PIN_GROUP("uart2", an7583_uart2),
> + PINCTRL_PIN_GROUP("uart2_cts_rts", an7583_uart2_cts_rts),
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Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=24
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