[PATCH 15/16] arm64: dts: st: enable usb on stm32mp257f-dk

Fabrice Gasnier <[email protected]>
Newsgroups org.kernel.vger.linux-devicetree,org.infradead.lists.linux-arm-kernel,org.infradead.lists.linux-phy,org.kernel.vger.linux-kernel,org.kernel.vger.linux-usb
Message-ID <20260821-ucpd-host-fusb340-v7-2-rfc-v1-15-c5e27cbc0795@foss.st.com>
STM32MP257F-DK board uses two USB controllers:
- USB 2.0 High-Speed Host, with external onboard HUB providing two
  connectors.
- USB 3.0 Super-Speed dual role Type-C port

The Type-C port management is done through integrated UCPD controller
and external TCPP03 I2C protection chip on I2C1. FUSB340 SuperSpeed
switch is used to reverse Super-Speed lines, depending on the
orientation.

Signed-off-by: Christian Bruel <[email protected]>
Signed-off-by: Fabrice Gasnier <[email protected]>
---
 arch/arm64/boot/dts/st/stm32mp257f-dk.dts | 111 ++++++++++++++++++++++++++++++
 1 file changed, 111 insertions(+)

diff --git a/arch/arm64/boot/dts/st/stm32mp257f-dk.dts b/arch/arm64/boot/dts/st/stm32mp257f-dk.dts
index 8daf3dfd5133..fdb21c4c48b9 100644
--- a/arch/arm64/boot/dts/st/stm32mp257f-dk.dts
+++ b/arch/arm64/boot/dts/st/stm32mp257f-dk.dts
@@ -27,6 +27,20 @@ chosen {
 		stdout-path = "serial0:115200n8";
 	};
 
+	fusb340: usb-switch {
+		compatible = "onnn,fusb340";
+		enable-gpios = <&gpioh 2 GPIO_ACTIVE_LOW>;
+		select-gpios = <&gpioh 3 GPIO_ACTIVE_HIGH>;
+		mode-switch;
+		orientation-switch;
+
+		port {
+			fusb340_con_ss: endpoint {
+				remote-endpoint = <&typec_ss>;
+			};
+		};
+	};
+
 	gpio-keys {
 		compatible = "gpio-keys";
 
@@ -138,6 +152,11 @@ &arm_wdt {
 	status = "okay";
 };
 
+&combophy {
+	st,ssc-on;
+	status = "okay";
+};
+
 &ethernet1 {
 	pinctrl-0 = <&eth1_rgmii_pins_b>;
 	pinctrl-1 = <&eth1_rgmii_sleep_pins_b>;
@@ -160,6 +179,28 @@ phy1_eth1: ethernet-phy@1 {
 	};
 };
 
+&i2c1 {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&i2c1_pins_a>;
+	pinctrl-1 = <&i2c1_sleep_pins_a>;
+	clock-frequency = <400000>;
+	status = "okay";
+	/* spare dmas for other usage */
+	/delete-property/dmas;
+	/delete-property/dma-names;
+
+	tcpp: typec@34 {
+		compatible = "st,tcpp03";
+		reg = <0x34>;
+		enable-gpios = <&gpioa 3 GPIO_ACTIVE_HIGH>;
+		interrupt-parent = <&gpiog>;
+		interrupts = <1 IRQ_TYPE_EDGE_BOTH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&tcpp_flgn_pins_a>;
+		status = "okay";
+	};
+};
+
 &i2c2 {
 	pinctrl-names = "default", "sleep";
 	pinctrl-0 = <&i2c2_pins_b>;
@@ -279,6 +320,44 @@ &sdmmc1 {
 	status = "okay";
 };
 
+&ucpd {
+	vconn-cc1-gpios = <&gpiof 5 GPIO_ACTIVE_HIGH>;
+	vconn-cc2-gpios = <&gpioc 3 GPIO_ACTIVE_HIGH>;
+	vconn-supply = <&scmi_v5v_vconn>;
+	st,tcpp = <&tcpp>;
+	status = "okay";
+
+	connector {
+		compatible = "usb-c-connector";
+		label = "USB-C";
+		data-role = "dual";
+		power-role = "dual";
+		try-power-role = "sink";
+		typec-power-opmode = "1.5A";
+		pd-disable;
+		self-powered;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				typec_ep: endpoint {
+					remote-endpoint = <&dwc3_ep>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				typec_ss: endpoint {
+					remote-endpoint = <&fusb340_con_ss>;
+				};
+			};
+		};
+	};
+};
+
 &usart2 {
 	pinctrl-names = "default", "idle", "sleep";
 	pinctrl-0 = <&usart2_pins_a>;
@@ -288,3 +367,35 @@ &usart2 {
 	/delete-property/dma-names;
 	status = "okay";
 };
+
+&usb2_phy1 {
+	vdd33-supply = <&scmi_vdd3v3_usb>;
+	status = "okay";
+};
+
+&usb2_phy2 {
+	vdd33-supply = <&scmi_vdd3v3_usb>;
+	status = "okay";
+};
+
+&usb3dr {
+	usb-role-switch;
+	status = "okay";
+	port {
+		dwc3_ep: endpoint {
+			remote-endpoint = <&typec_ep>;
+		};
+	};
+};
+
+&usbh_ehci {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+	/* onboard HUB */
+	hub@1 {
+		compatible = "usb424,2422";
+		reg = <1>;
+		vdd-supply = <&scmi_v3v3>;
+	};
+};

-- 
2.43.0
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