Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Local branch clocks like `gcc_usb20_master_clk` incorrectly use `BRANCH_HALT_VOTED` instead of `BRANCH_HALT`.
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--- Patch [11]: [PATCH v3 11/15] clk: qcom: Add Global Clock Controller driver for Kuno ---
commit 87ef960371a78ac9a0bb9691a723f3b871043695
Author: Hardeep Sharma <[email protected]>
Subject: clk: qcom: Add Global Clock Controller driver for Kuno
Add the global clock controller (GCC) driver for the Qualcomm Kuno SoC,
providing the PLLs, root clock generators, gate/branch clocks and resets
used by the peripheral devices.
> diff --git a/drivers/clk/qcom/gcc-kuno.c b/drivers/clk/qcom/gcc-kuno.c
> new file mode 100644
> index 0000000000000..f7401ae315dd0
> --- /dev/null
> +++ b/drivers/clk/qcom/gcc-kuno.c
[ ... ]
> +static struct clk_branch gcc_emac0_axi_clk = {
> + .halt_reg = 0x71018,
> + .halt_check = BRANCH_HALT_VOTED,
> + .hwcg_reg = 0x71018,
> + .hwcg_bit = 1,
> + .clkr = {
> + .enable_reg = 0x71018,
> + .enable_mask = BIT(0),
[Severity: High]
Does this EMAC clock use the correct halt check? Since enable_reg and halt_reg
are the same (0x71018), this appears to be a local branch clock rather than an
APCS voted clock.
Using BRANCH_HALT_VOTED bypasses the halt check entirely, which could allow
the kernel to return from clk_enable() before the clock has physically started,
potentially causing unclocked hardware accesses. Should this use BRANCH_HALT
instead?
[ ... ]
> +static struct clk_branch gcc_usb20_master_clk = {
> + .halt_reg = 0x27018,
> + .halt_check = BRANCH_HALT_VOTED,
> + .clkr = {
> + .enable_reg = 0x27018,
> + .enable_mask = BIT(0),
[Severity: High]
Similarly, does gcc_usb20_master_clk incorrectly use BRANCH_HALT_VOTED?
Its enable_reg is the same as halt_reg (0x27018), so bypassing the halt check
might lead to unclocked hardware accesses during device probe or power
management transitions.
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Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=11
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