Re: EDAC support for Arrow Lake-HX (8086:7d1c) - working out-of-tree driver, test hardware available
Chaoyi Chen <[email protected]> Thu, 16 Jul 2026 14:28:31 +0800
| Newsgroups | org.kernel.vger.linux-edac |
|---|---|
| Message-ID | <[email protected]> |
Hello Zura, On 7/16/2026 1:55 PM, Emba Consulting wrote: > On 7/16/2026 2:39 PM, Chaoyi Chen wrote: >> I have an Intel Core Ultra 7 270K Plus (Arrow Lake-S Refresh), and it >> appears to be 8086:7d1a. I'll test your driver, thanks! > > Good to hear. Two heads-ups before you build: > > - The module's ID table previously matched only 7d1c; I've pushed a > commit adding 7d1a (reusing the ARL-HX register map unchanged), so > pull https://github.com/zs311521/edac-arl-hx first or it won't bind. > - mchbar-probe.py assumed my board's MCHBAR base; it now reads it > from PCI 00:00.0 config the way the driver does, so pull that too. > > Suggested order on your machine: > > 1. mchbar-probe.py (read-only, /dev/mem): it decodes MAD_DIMM and > ECCERRLOG from userspace. If the topology it prints doesn't match > your physical DIMM population, the ARL-S Refresh layout differs > from ARL-HX and the module's counts shouldn't be trusted - the > probe output is useful either way. > > 2. modprobe/insmod. The defaults never write to hardware (polling > only, no MSR 0x791, no ERRSTS clear), so a load is safe even if > the die differs. It refuses with "No ECC support" if CAPID0 says > ECC is disabled. > > Output worth sharing: lspci -nn -s 00:00.0, > dmidecode -t 16 -t 17, the probe script output, and dmesg after load. > And if your board exposes an ACPI EINJ table, injecting a corrected > error would exercise the decode end to end - my BIOS has none, so > that is the one path I have not been able to validate. > > Thanks. > I did a quick test, and it seems to be working properly :) The output for your information: $ lspci -nn -s 00:00.0 00:00.0 Host bridge [0600]: Intel Corporation Device [8086:7d1a] (rev 01) $ sudo dmidecode -t 16 -t 17 # dmidecode 3.6 Getting SMBIOS data from sysfs. SMBIOS 3.8.0 present. # SMBIOS implementations newer than version 3.7.0 are not # fully supported by this version of dmidecode. Handle 0x000E, DMI type 16, 23 bytes Physical Memory Array Location: System Board Or Motherboard Use: System Memory Error Correction Type: Single-bit ECC Maximum Capacity: 128 GB Error Information Handle: Not Provided Number Of Devices: 4 Handle 0x000F, DMI type 17, 92 bytes Memory Device Array Handle: 0x000E Error Information Handle: Not Provided Total Width: Unknown Data Width: Unknown Size: No Module Installed Form Factor: Unknown Set: None Locator: Controller0-ChannelA-DIMM0 Bank Locator: BANK 0 Type: Unknown Type Detail: None Handle 0x0010, DMI type 17, 92 bytes Memory Device Array Handle: 0x000E Error Information Handle: Not Provided Total Width: Unknown Data Width: Unknown Size: No Module Installed Form Factor: Unknown Set: None Locator: Controller0-ChannelA-DIMM1 Bank Locator: BANK 0 Type: Unknown Type Detail: None Handle 0x0011, DMI type 17, 92 bytes Memory Device Array Handle: 0x000E Error Information Handle: Not Provided Total Width: Unknown Data Width: Unknown Size: No Module Installed Form Factor: Unknown Set: None Locator: Controller0-ChannelB-DIMM0 Bank Locator: BANK 1 Type: Unknown Type Detail: None Handle 0x0012, DMI type 17, 92 bytes Memory Device Array Handle: 0x000E Error Information Handle: Not Provided Total Width: 80 bits Data Width: 64 bits Size: 32 GB Form Factor: DIMM Set: None Locator: Controller0-ChannelB-DIMM1 Bank Locator: BANK 1 Type: DDR5 Type Detail: Synchronous Speed: 5600 MT/s Manufacturer: Micron Technology Serial Number: 44343856 Asset Tag: 9876543210 Part Number: MTC20C2085S1EC56BD1 Rank: 2 Configured Memory Speed: 5600 MT/s Minimum Voltage: 1.1 V Maximum Voltage: 1.1 V Configured Voltage: 1.1 V Memory Technology: DRAM Memory Operating Mode Capability: Volatile memory Firmware Version: Not Specified Module Manufacturer ID: Bank 1, Hex 0x2C Module Product ID: Unknown Memory Subsystem Controller Manufacturer ID: Unknown Memory Subsystem Controller Product ID: Unknown Non-Volatile Size: None Volatile Size: 32 GB Cache Size: None Logical Size: None $ dmesg [965428.124209] edac_arl_hx: loading out-of-tree module taints kernel. [965428.124215] edac_arl_hx: module verification failed: signature and/or required key missing - tainting kernel [965428.125593] resource: resource sanity check: requesting [mem 0x00000000fedc0000-0x00000000fedcffff], which spans more than PNP0C02:04 [mem 0xfedc0000-0xfedc7fff] [965428.125597] caller arl_init_one+0xe2/0x640 [edac_arl_hx] mapping multiple BARs [965428.125601] EDAC arl_hx: CAPID0[1]=0x21 (PDCD=0), MAD_DIMM_CH1=0x00000220 [965428.125619] EDAC arl_hx: mc 0 ch 0 dimm 0: 0 MiB, 1 rank(s), type 4 [965428.125620] EDAC arl_hx: mc 0 ch 0 dimm 1: 0 MiB, 1 rank(s), type 4 [965428.125621] EDAC arl_hx: mc 0 ch 1 dimm 0: 16384 MiB, 2 rank(s), type 4 [965428.125622] EDAC arl_hx: mc 0 ch 1 dimm 1: 0 MiB, 1 rank(s), type 4 [965428.125646] EDAC MC0: Giving out device to module arl_hx_edac controller ARL_HX: DEV 0000:00:00.0 (POLLED) [965428.125660] EDAC arl_hx: CAPID0[1]=0x21 (PDCD=0), MAD_DIMM_CH1=0x00000220 [965428.125668] EDAC arl_hx: mc 1 ch 0 dimm 0: 0 MiB, 1 rank(s), type 4 [965428.125669] EDAC arl_hx: mc 1 ch 0 dimm 1: 0 MiB, 1 rank(s), type 4 [965428.125670] EDAC arl_hx: mc 1 ch 1 dimm 0: 16384 MiB, 2 rank(s), type 4 [965428.125671] EDAC arl_hx: mc 1 ch 1 dimm 1: 0 MiB, 1 rank(s), type 4 [965428.125685] EDAC MC1: Giving out device to module arl_hx_edac controller ARL_HX_1: DEV 0000:00:00.0 (POLLED) [965428.125686] EDAC arl_hx: registered 2 IMC(s), mode=poll, clear=read-only --- Unfortunately, my motherboard doesn't seem to have an option to allow EINJ. After quickly reviewing Intel's manual, I have essentially the same questions as you. -- Best, Chaoyi