Re: EDAC support for Arrow Lake-HX (8086:7d1c) - working out-of-tree driver, test hardware available

On 7/16/2026 4:28 PM, Chaoyi Chen wrote:
> I did a quick test, and it seems to be working properly :)

Thanks - that's a second die and a very different population (one
32GB UDIMM vs my two SODIMMs) decoding exactly, which is good signal
that the MAD_DIMM masks hold across the family. I've noted your
config in the repo README.

The resource sanity check in your dmesg (the 64 KiB IMC window
spanning past your board's 32 KiB PNP0C02 region) looks harmless but
is worth carrying into review when this becomes an ie31200 patch.

> Unfortunately, my motherboard doesn't seem to have an option to
> allow EINJ. After quickly reviewing Intel's manual, I have
> essentially the same questions as you.

Same picture here, then - the open items stay with the maintainers:
the documented ERRSTS clear vs ie31200's MSR 0x791, and whether CMCI
delivery is contracted for this family's out-of-band ECC. Happy to
write the ie31200 patch with a dedicated cfg (no MSR, ERRSTS clear)
whenever there's a steer - with your Tested-by on 7d1a alongside
mine on 7d1c, if you're willing.

Thanks.