[PATCH v4 08/21] pinctrl: starfive: Add StarFive JHB100 sys1 controller driver
Changhuang Liang <[email protected]> Sat, 1 Aug 2026 00:26:58 -0700
| Newsgroups | org.kernel.vger.linux-gpio,org.infradead.lists.linux-riscv,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
Add pinctrl driver for StarFive JHB100 SoC System-1(sys1) pinctrl controller. Co-developed-by: Lianfeng Ouyang <[email protected]> Signed-off-by: Lianfeng Ouyang <[email protected]> Signed-off-by: Alex Soo <[email protected]> Signed-off-by: Changhuang Liang <[email protected]> --- drivers/pinctrl/starfive/Kconfig | 11 +++ drivers/pinctrl/starfive/Makefile | 1 + .../starfive/pinctrl-starfive-jhb100-sys1.c | 92 +++++++++++++++++++ 3 files changed, 104 insertions(+) create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jhb100-sys1.c diff --git a/drivers/pinctrl/starfive/Kconfig b/drivers/pinctrl/starfive/Kconfig index d4babf78f8c5..1cf43e0ae1d7 100644 --- a/drivers/pinctrl/starfive/Kconfig +++ b/drivers/pinctrl/starfive/Kconfig @@ -78,3 +78,14 @@ config PINCTRL_STARFIVE_JHB100_SYS0H This also provides an interface to the GPIO pins not used by other peripherals supporting inputs, outputs, configuring pull-up/pull-down and interrupts on input changes. + +config PINCTRL_STARFIVE_JHB100_SYS1 + tristate "StarFive JHB100 SoC System-1 pinctrl and GPIO driver" + depends on ARCH_STARFIVE || COMPILE_TEST + select PINCTRL_STARFIVE_JHB100 + default ARCH_STARFIVE + help + Say yes here to support System-1 pin control on the StarFive JHB100 SoC. + This also provides an interface to the GPIO pins not used by other + peripherals supporting inputs, outputs, configuring pull-up/pull-down + and interrupts on input changes. diff --git a/drivers/pinctrl/starfive/Makefile b/drivers/pinctrl/starfive/Makefile index b26156a6d0eb..8d96cf80d377 100644 --- a/drivers/pinctrl/starfive/Makefile +++ b/drivers/pinctrl/starfive/Makefile @@ -9,3 +9,4 @@ obj-$(CONFIG_PINCTRL_STARFIVE_JH7110_AON) += pinctrl-starfive-jh7110-aon.o obj-$(CONFIG_PINCTRL_STARFIVE_JHB100) += pinctrl-starfive-jhb100.o obj-$(CONFIG_PINCTRL_STARFIVE_JHB100_SYS0) += pinctrl-starfive-jhb100-sys0.o obj-$(CONFIG_PINCTRL_STARFIVE_JHB100_SYS0H) += pinctrl-starfive-jhb100-sys0h.o +obj-$(CONFIG_PINCTRL_STARFIVE_JHB100_SYS1) += pinctrl-starfive-jhb100-sys1.o diff --git a/drivers/pinctrl/starfive/pinctrl-starfive-jhb100-sys1.c b/drivers/pinctrl/starfive/pinctrl-starfive-jhb100-sys1.c new file mode 100644 index 000000000000..4d74afaec1e2 --- /dev/null +++ b/drivers/pinctrl/starfive/pinctrl-starfive-jhb100-sys1.c @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Pinctrl / GPIO driver for StarFive JHB100 SoC System-1 domain + * + * Copyright (C) 2024 StarFive Technology Co., Ltd. + * Author: Alex Soo <[email protected]> + * + */ + +#include <dt-bindings/pinctrl/starfive,jhb100-pinctrl.h> +#include <linux/mod_devicetable.h> +#include <linux/platform_device.h> + +#include "pinctrl-starfive-jhb100.h" + +static const struct jhb100_pin_layout_desc jhb100_sys1_pl_desc[] = { + { .pin_start = 0, .pin_cnt = 7, .name = "gpio", .gpio_func_sel = 0 }, + { .pin_start = 7, .pin_cnt = 1, .name = "espi1_reset", .gpio_func_sel = 1 }, + { 0xff }, +}; + +static struct config_reg_layout_desc jhb100_sys1_pinctrl_rl_desc[] = { + { + .pin_start = 0, + .pin_cnt = 8, + .fields[PAD_CFG_DRIVE_STRENGTH_2BIT] = { .shift = 0, .width = 2 }, + .fields[PAD_CFG_INPUT_ENABLE] = { .shift = 2, .width = 1 }, + .fields[PAD_CFG_PULL_DOWN] = { .shift = 3, .width = 1 }, + .fields[PAD_CFG_PULL_UP] = { .shift = 4, .width = 1 }, + .fields[PAD_CFG_SLEW_RATE] = { .shift = 5, .width = 1 }, + .fields[PAD_CFG_SCHMITT_TRIGGER_SELECT] = { .shift = 6, .width = 1 }, + .fields[PAD_CFG_DEBOUNCE_WIDTH] = { .shift = 15, .width = 17 }, + }, + { 0xff }, +}; + +static const struct starfive_pinctrl_regs jhb100_sys1_pinctrl_regs = { + .func_sel = { .reg = 0x30, .width_per_pin = 2 }, + .config = 0x04, + .output = 0x24, + .output_en = 0x28, + .gpio_status = 0x2c, + .irq_en = 0x34, + .irq_status = 0x38, + .irq_clr = 0x3c, + .irq_trigger = 0x40, + .irq_level = 0x44, + .irq_both_edge = 0x48, + .irq_edge = 0x4c, +}; + +static const struct jhb100_pinctrl_func_maps jhb100_func_maps_sys1[] = { + { .func = "espi", .val = 1 }, + { .func = "espi_reset", .val = 0 }, + { .func = "gpio", .val = 0, + .max_pin = JHB100_FUNC_MAPS_MAX_PIN(PADNUM_SYS1_GPIO_A22) }, + { .func = "gpio", .val = 1, + .max_pin = JHB100_FUNC_MAPS_MAX_PIN(PADNUM_SYS1_GPIO_A23) }, + { .func = "host0_port80", .val = 2 }, + { .func = "host1_port80", .val = 3 }, +}; + +static const struct jhb100_pinctrl_domain_info jhb100_sys1_pinctrl_info = { + .name = "jhb100-sys1", + .pl_desc = jhb100_sys1_pl_desc, + .crl_desc = jhb100_sys1_pinctrl_rl_desc, + .regs = &jhb100_sys1_pinctrl_regs, + .fmaps = jhb100_func_maps_sys1, + .num_maps = ARRAY_SIZE(jhb100_func_maps_sys1), +}; + +static const struct of_device_id jhb100_sys1_pinctrl_of_match[] = { + { + .compatible = "starfive,jhb100-sys1-pinctrl", + .data = &jhb100_sys1_pinctrl_info, + }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, jhb100_sys1_pinctrl_of_match); + +static struct platform_driver jhb100_sys1_pinctrl_driver = { + .probe = jhb100_pinctrl_probe, + .driver = { + .name = "starfive-jhb100-sys1-pinctrl", + .of_match_table = jhb100_sys1_pinctrl_of_match, + }, +}; +module_platform_driver(jhb100_sys1_pinctrl_driver); + +MODULE_DESCRIPTION("Pinctrl driver for StarFive JHB100 SoC System-1 domain"); +MODULE_AUTHOR("Alex Soo <[email protected]>"); +MODULE_LICENSE("GPL"); -- 2.25.1