Re: Re: [PATCH v5 10/12] serial: 8250: add Ambarella UART driver

On Wed, Aug 19, 2026 at 02:31:59PM +0800, zl020895 wrote:

> This is Ambarella 8250-compatible IP, not Synopsys DesignWare. We
> first tried 8250_dw after Linus asked us to move to the 8250 library;
> you then told us not to touch 8250_dw and to use 8250_ambarella
> instead. That is what this patch is.
> Background:
> https://lore.kernel.org/r/CAD++jLm6HzEU1TM-c=Vtjv3FJEBecVP7TyxSgq_Q0zF-YwT6NA@mail.gmail.com/
> https://lore.kernel.org/linux-serial/[email protected]/
> https://lore.kernel.org/linux-serial/[email protected]/
> I will also switch to uart_read_port_properties() and trim the
> 8250_dw-derived boilerplate.

But it has layout like Synopsys? Do you have a link to the datasheet?

> ---- Replied Message ----
> | From | Andy Shevchenko<[email protected]> |
> | Date | 08/18/2026 22:17 |
> On Tue, Aug 18, 2026 at 06:31:24PM +0800, Long Zhao via B4 Relay wrote:
> 
> > Add an 8250 platform driver for Ambarella CV75 instead of claiming
> > snps,dw-apb-uart compatibility.
> 
> This is a record from a changelog. There is nothing in the commit message.
> ...
> 
> The code seems like an almost blind copy of 8250_dw.c.
> 
> > +#define AMBARELLA_UART_USR        0x1f
> > +#define AMBARELLA_UART_USR_BUSY        BIT(0)
> 
> So, is it Synopsys IP-based design? How this gets into this platform? This
> whole story completely made me lost.
> 
> > +#define AMBARELLA_UART_IIR_IID        GENMASK(3, 0)
> > +#define AMBARELLA_UART_IIR_STATUS    GENMASK(5, 0)

...

> > +    of_property_read_u32(dev->of_node, "reg-shift", &reg_shift);
> > +    of_property_read_u32(dev->of_node, "reg-io-width", &reg_io_width);
> > +    uart.port.regshift = reg_shift;
> 
> > +    switch (reg_io_width) {
> > +    case 4:
> > +        uart.port.iotype = UPIO_MEM32;
> > +        uart.port.serial_in = ambarella_serial_in;
> > +        uart.port.serial_out = ambarella_serial_out;
> > +        break;
> > +    default:
> > +        return dev_err_probe(dev, -EINVAL,
> > +                     "unsupported reg-io-width %u\n",
> > +                     reg_io_width);
> > +    }
> 
> This is handled by uart_read_port_properties().

-- 
With Best Regards,
Andy Shevchenko