Re: [PATCH v3 4/7] PCI: dwc: Use common pci_host_common_link_train_delay() helper

Manivannan Sadhasivam <[email protected]>
Newsgroups org.kernel.vger.linux-omap,org.infradead.lists.linux-arm-kernel,org.infradead.lists.linux-mediatek,org.kernel.vger.linux-kernel,org.kernel.vger.linux-pci,org.kernel.vger.linux-renesas-soc
Message-ID <6xcq6e6c2jc7wxhvv3kjwp5d2ik62ed7kukb3e62yogf3phtxk@6besox4h2v4n>
On Mon, May 11, 2026 at 04:02:42PM +0900, Krzysztof Wilczyński wrote:
> Hello,
> 
> > -	/*
> > -	 * As per PCIe r6.0, sec 6.6.1, a Downstream Port that supports Link
> > -	 * speeds greater than 5.0 GT/s, software must wait a minimum of 100 ms
> > -	 * after Link training completes before sending a Configuration Request.
> > -	 */
> > -	if (pci->max_link_speed > 2)
> > -		msleep(PCIE_RESET_CONFIG_WAIT_MS);
> > +	pci_host_common_link_train_delay(pci->max_link_speed);
> 
> This comment could move to the helper you added.
> 

Not required, as the macro definition in drivers/pci/pci.h already has an
elaborative comment with spec citation.

- Mani

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