[PATCH for-next 4/4] RDMA/bnxt_re: Add support for larger PBL pages for QP
Selvin Xavier <[email protected]>
| Newsgroups | org.kernel.vger.linux-rdma |
|---|---|
| Message-ID | <[email protected]> |
Advertise the PBL page size and first-word offset (FWO) for SQ/RQ in CREATE_QP so the firmware can use huge-page QP buffers. Signed-off-by: Saravanan Vajravel <[email protected]> Signed-off-by: Selvin Xavier <[email protected]> --- drivers/infiniband/hw/bnxt_re/qplib_fp.c | 19 +++++++++++++----- drivers/infiniband/hw/bnxt_re/roce_hsi.h | 25 ++++++++++++++++++++++-- 2 files changed, 37 insertions(+), 7 deletions(-) diff --git a/drivers/infiniband/hw/bnxt_re/qplib_fp.c b/drivers/infiniband/hw/bnxt_re/qplib_fp.c index 0319fe76c634..2fb06abda552 100644 --- a/drivers/infiniband/hw/bnxt_re/qplib_fp.c +++ b/drivers/infiniband/hw/bnxt_re/qplib_fp.c @@ -985,9 +985,14 @@ int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) pbl = &sq->hwq.pbl[PBL_LVL_0]; req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); req.sq_pg_size_sq_lvl = sq->hwq.pg_sz_lvl; + if (bnxt_re_pbl_size_supported(res->dattr->dev_cap_ext_flags_1)) { + qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_SQ_PBL_PG_SIZE_VALID; + req.sq_pbl_pg_size = bnxt_qplib_get_pbl_page_size(&sq->sg_info); + } req.sq_fwo_sq_sge = - cpu_to_le16(((sq->max_sge & CMDQ_CREATE_QP_SQ_SGE_MASK) << - CMDQ_CREATE_QP_SQ_SGE_SFT) | 0); + cpu_to_le16((((sq->sg_info.fwo_offset >> BNXT_QPLIB_QP_FWO_SHIFT) << + CMDQ_CREATE_QP_SQ_FWO_SFT) & CMDQ_CREATE_QP_SQ_FWO_MASK) | + (sq->max_sge & CMDQ_CREATE_QP_SQ_SGE_MASK)); req.scq_cid = cpu_to_le32(qp->scq->id); /* RQ */ @@ -997,12 +1002,16 @@ int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) pbl = &rq->hwq.pbl[PBL_LVL_0]; req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); req.rq_pg_size_rq_lvl = rq->hwq.pg_sz_lvl; + if (bnxt_re_pbl_size_supported(res->dattr->dev_cap_ext_flags_1)) { + qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_RQ_PBL_PG_SIZE_VALID; + req.rq_pbl_pg_size = bnxt_qplib_get_pbl_page_size(&rq->sg_info); + } nsge = (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_STATIC) ? 6 : rq->max_sge; req.rq_fwo_rq_sge = - cpu_to_le16(((nsge & - CMDQ_CREATE_QP_RQ_SGE_MASK) << - CMDQ_CREATE_QP_RQ_SGE_SFT) | 0); + cpu_to_le16((((rq->sg_info.fwo_offset >> BNXT_QPLIB_QP_FWO_SHIFT) << + CMDQ_CREATE_QP_RQ_FWO_SFT) & CMDQ_CREATE_QP_RQ_FWO_MASK) | + (nsge & CMDQ_CREATE_QP_RQ_SGE_MASK)); } else { /* SRQ */ qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_SRQ_USED; diff --git a/drivers/infiniband/hw/bnxt_re/roce_hsi.h b/drivers/infiniband/hw/bnxt_re/roce_hsi.h index bbcd723cd2b5..aa85cd379e48 100644 --- a/drivers/infiniband/hw/bnxt_re/roce_hsi.h +++ b/drivers/infiniband/hw/bnxt_re/roce_hsi.h @@ -437,8 +437,10 @@ struct cmdq_create_qp { #define CMDQ_CREATE_QP_QP_FLAGS_EXPRESS_MODE_ENABLED 0x100UL #define CMDQ_CREATE_QP_QP_FLAGS_STEERING_TAG_VALID 0x200UL #define CMDQ_CREATE_QP_QP_FLAGS_RDMA_READ_OR_ATOMICS_USED 0x400UL + #define CMDQ_CREATE_QP_QP_FLAGS_RQ_PBL_PG_SIZE_VALID 0x2000UL + #define CMDQ_CREATE_QP_QP_FLAGS_SQ_PBL_PG_SIZE_VALID 0x4000UL #define CMDQ_CREATE_QP_QP_FLAGS_LAST \ - CMDQ_CREATE_QP_QP_FLAGS_RDMA_READ_OR_ATOMICS_USED + CMDQ_CREATE_QP_QP_FLAGS_SQ_PBL_PG_SIZE_VALID u8 type; #define CMDQ_CREATE_QP_TYPE_RC 0x2UL #define CMDQ_CREATE_QP_TYPE_UD 0x4UL @@ -501,7 +503,26 @@ struct cmdq_create_qp { __le64 orrq_addr; __le32 request_xid; __le16 steering_tag; - __le16 reserved16; + u8 sq_pbl_pg_size; + #define CMDQ_CREATE_QP_SQ_PBL_PG_SIZE_MASK 0xfUL + #define CMDQ_CREATE_QP_SQ_PBL_PG_SIZE_SFT 0 + #define CMDQ_CREATE_QP_SQ_PBL_PG_SIZE_PG_4K 0x0UL + #define CMDQ_CREATE_QP_SQ_PBL_PG_SIZE_PG_8K 0x1UL + #define CMDQ_CREATE_QP_SQ_PBL_PG_SIZE_PG_64K 0x2UL + #define CMDQ_CREATE_QP_SQ_PBL_PG_SIZE_PG_2M 0x3UL + #define CMDQ_CREATE_QP_SQ_PBL_PG_SIZE_PG_8M 0x4UL + #define CMDQ_CREATE_QP_SQ_PBL_PG_SIZE_PG_1G 0x5UL + #define CMDQ_CREATE_QP_SQ_PBL_PG_SIZE_LAST CMDQ_CREATE_QP_SQ_PBL_PG_SIZE_PG_1G + u8 rq_pbl_pg_size; + #define CMDQ_CREATE_QP_RQ_PBL_PG_SIZE_MASK 0xfUL + #define CMDQ_CREATE_QP_RQ_PBL_PG_SIZE_SFT 0 + #define CMDQ_CREATE_QP_RQ_PBL_PG_SIZE_PG_4K 0x0UL + #define CMDQ_CREATE_QP_RQ_PBL_PG_SIZE_PG_8K 0x1UL + #define CMDQ_CREATE_QP_RQ_PBL_PG_SIZE_PG_64K 0x2UL + #define CMDQ_CREATE_QP_RQ_PBL_PG_SIZE_PG_2M 0x3UL + #define CMDQ_CREATE_QP_RQ_PBL_PG_SIZE_PG_8M 0x4UL + #define CMDQ_CREATE_QP_RQ_PBL_PG_SIZE_PG_1G 0x5UL + #define CMDQ_CREATE_QP_RQ_PBL_PG_SIZE_LAST CMDQ_CREATE_QP_RQ_PBL_PG_SIZE_PG_1G }; /* creq_create_qp_resp (size:128b/16B) */ -- 2.39.3