[PATCH v2 4/9] clk: renesas: rzg2l: Add support for divider flags
Biju <[email protected]>
| Newsgroups | org.kernel.vger.linux-renesas-soc,org.kernel.vger.linux-clk,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
From: Biju Das <[email protected]> Add support for passing divider flags apart from clock flags from soc specific clock drivers. Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Biju Das <[email protected]> --- v1->v2: * Collected tag. * Fixed a check patch warning by using (_div_flags) in DEF_DIV_FLAGS macro. --- drivers/clk/renesas/rzg2l-cpg.c | 8 ++++---- drivers/clk/renesas/rzg2l-cpg.h | 12 ++++++++++-- 2 files changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c index 07b78cbc4531..2d80775c60c2 100644 --- a/drivers/clk/renesas/rzg2l-cpg.c +++ b/drivers/clk/renesas/rzg2l-cpg.c @@ -487,20 +487,20 @@ rzg2l_cpg_div_clk_register(const struct cpg_core_clk *core, if (core->dtable) clk_hw = clk_hw_register_divider_table(dev, core->name, - parent_name, 0, + parent_name, core->core_flags, base + GET_REG_OFFSET(core->conf), GET_SHIFT(core->conf), GET_WIDTH(core->conf), - core->core_flags, + core->div_flags, core->dtable, &priv->rmw_lock); else clk_hw = clk_hw_register_divider(dev, core->name, - parent_name, 0, + parent_name, core->core_flags, base + GET_REG_OFFSET(core->conf), GET_SHIFT(core->conf), GET_WIDTH(core->conf), - core->core_flags, &priv->rmw_lock); + core->div_flags, &priv->rmw_lock); if (IS_ERR(clk_hw)) return ERR_CAST(clk_hw); diff --git a/drivers/clk/renesas/rzg2l-cpg.h b/drivers/clk/renesas/rzg2l-cpg.h index 38db209aabf9..ebf6b744dac4 100644 --- a/drivers/clk/renesas/rzg2l-cpg.h +++ b/drivers/clk/renesas/rzg2l-cpg.h @@ -112,6 +112,7 @@ struct cpg_core_clk { notifier_fn_t notifier; u32 core_flags; u32 mux_flags; + u32 div_flags; int num_parents; }; @@ -168,11 +169,18 @@ enum clk_types { #define DEF_DIV(_name, _id, _parent, _conf, _dtable) \ DEF_TYPE(_name, _id, CLK_TYPE_DIV, .conf = _conf, \ .parent = _parent, .dtable = _dtable, \ - .core_flags = CLK_DIVIDER_HIWORD_MASK) + .core_flags = 0, \ + .div_flags = CLK_DIVIDER_HIWORD_MASK) #define DEF_DIV_RO(_name, _id, _parent, _conf, _dtable) \ DEF_TYPE(_name, _id, CLK_TYPE_DIV, .conf = _conf, \ .parent = _parent, .dtable = _dtable, \ - .core_flags = CLK_DIVIDER_READ_ONLY) + .core_flags = 0, \ + .div_flags = CLK_DIVIDER_READ_ONLY) +#define DEF_DIV_FLAGS(_name, _id, _parent, _conf, _dtable, _flags, _div_flags) \ + DEF_TYPE(_name, _id, CLK_TYPE_DIV, .conf = _conf, \ + .parent = _parent, .dtable = _dtable, \ + .core_flags = _flags, \ + .div_flags = CLK_DIVIDER_HIWORD_MASK | (_div_flags)) #define DEF_G3S_DIV(_name, _id, _parent, _conf, _sconf, _dtable, _invalid_rate, \ _max_rate, _clk_flags, _notif) \ DEF_TYPE(_name, _id, CLK_TYPE_G3S_DIV, .conf = _conf, .sconf = _sconf, \ -- 2.43.0