Re: [PATCH v2 5/8] target/arm: Implement CPACR.ASEDIS and HCPTR.TASE

On 8/17/26 05:38, Peter Maydell wrote:
> When executing at AArch32, there are optional trap bits for Neon
> instructions in CPACR and HCPTR. We don't currently implement these.
> 
> Now we have a separate code path for access checks for Neon insns, we
> can straightforwardly add the check there.  We need to track the
> target EL for Neon-specific trapping in a new TB flag.
> 
> Resolves:https://gitlab.com/qemu-project/qemu/-/work_items/1499
> Signed-off-by: Peter Maydell<[email protected]>
> ---
>   target/arm/cpu.h               |  6 +++
>   target/arm/tcg/hflags.c        | 82 ++++++++++++++++++++++++++++++++++
>   target/arm/tcg/translate-vfp.c | 16 +++++--
>   target/arm/tcg/translate.c     |  1 +
>   target/arm/tcg/translate.h     |  1 +
>   5 files changed, 103 insertions(+), 3 deletions(-)

Reviewed-by: Richard Henderson <[email protected]>

r~