[PATCH 2/5] target/riscv: save ELP in MPELP for RNMI exceptions

An M-mode exception with mnstatus.NMIE clear uses the RNMI vector, but
Smrnmi otherwise specifies the normal M-mode state updates. MRET restores
ELP from mstatus.MPELP, so save it there rather than in MNPELP.
Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/4223

Signed-off-by: wangyang <[email protected]>
---
 target/riscv/tcg/cpu_helper.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/target/riscv/tcg/cpu_helper.c b/target/riscv/tcg/cpu_helper.c
index 07d9222..6337e91 100644
--- a/target/riscv/tcg/cpu_helper.c
+++ b/target/riscv/tcg/cpu_helper.c
@@ -2275,12 +2275,7 @@ void riscv_cpu_do_interrupt(CPUState *cs)
         /* handle the trap in M-mode */
         /* save elp status */
         if (cpu_get_fcfien(env)) {
-            if (nnmi_excep) {
-                env->mnstatus = set_field(env->mnstatus, MNSTATUS_MNPELP,
-                                          env->elp);
-            } else {
-                env->mstatus = set_field(env->mstatus, MSTATUS_MPELP, env->elp);
-            }
+            env->mstatus = set_field(env->mstatus, MSTATUS_MPELP, env->elp);
         }
 
         if (riscv_has_ext(env, RVH)) {
-- 
2.55.0.windows.2