[PATCH 00/12] single-binary: link ARM and RISC-V into qemu-system

Yonggang Luo <[email protected]>
Newsgroups org.nongnu.qemu-devel,org.nongnu.qemu-arm,org.nongnu.qemu-riscv
Message-ID <[email protected]>
This series produces one qemu-system binary that can run ARM (32 and 64)
and RISC-V (32 and 64, little- and big-endian TargetInfo). It follows
Pierrick Bouvier's merged series "single-binary: implement dynamic
filtering for machine types":

  https://patchew.org/QEMU/[email protected]/

That work added TYPE_TARGET_SPECIFIC so machines can be filtered per
target in one process. This series uniquifies remaining per-target C
symbols and QOM names, selects TargetInfo at runtime, and links ARM
plus RISC-V into qemu-system.

A combined link cannot keep C symbols or QOM type names that were unique
only because each qemu-system-$arch was a separate binary. The first
patches remove those collisions:

- TYPE_ACCEL_CPU is a single abstract accel-cpu parent, registered once
  next to TYPE_ACCEL. Leaf names still encode the CPU type so
  accel_init_cpu_interfaces() can look up "<accel>-accel-"
  CPU_RESOLVING_TYPE.
- ARM and RISC-V virt QOM names become arm-virt and riscv-virt. The
  boards keep -machine virt via mc->alias after the selected target is
  applied.
- virt ACPI helpers and RISC-V TCG crc32/crc32c/wfi helpers get an arch
  prefix so the combined link does not need meson -D name mangling.
  LoongArch virt_acpi_setup is renamed in the same pass.

Target selection then has to work with more than one TargetInfo in the
process:

- Register target-info-<name>-le and -be from one system
  target-info-def.c unit, sharing arch fields. is_default follows
  TARGET_BIG_ENDIAN so riscv/arm stay LE and ppc/s390x stay BE when
  -target is omitted.
- Parse -target before TargetInfo is fixed. Tokens are target_name or
  target_name-be / -le. When -target is omitted, infer the token from
  the program basename (strip .exe, longest registered suffix, drop a
  trailing w for Windows GUI binaries).
- Combined binaries cannot keep one global C symbol per arch for
  query-cpu-definitions, dump notes, or Angel semihosting. Those
  handlers move onto a process-wide TargetCpuOps table.

The last patch builds qemu-system (and qemu-systemw on Windows) from
aarch64 common/system objects plus RISC-V arch objects, and installs
qemu-system-{arm,aarch64,riscv32,riscv64} as symlinks so argv[0] still
selects TargetInfo.

Examples:

  qemu-system -target aarch64 -M virt ...
  qemu-system-riscv64 -M virt ...

A basename that matches no registered token falls through to the unique
default. A combined binary with no suffix requires -target when more
than one default TargetInfo is registered.

Based-on: <[email protected]>

Yonggang Luo (12):
  accel: use a shared TYPE_ACCEL_CPU parent
  hw/riscv/virt: use unique QOM name and target filter
  hw/arm/virt: use unique QOM name and target filter
  hw/arm/virt: prefix ACPI helpers with arm_virt_
  hw/riscv/virt: prefix ACPI helpers with riscv_virt_
  hw/loongarch/virt: prefix ACPI helper with loongarch_virt_
  target/riscv: uniquify TCG crc32, crc32c, and wfi helper names
  target/riscv: seed cfg.big_endian from TargetInfo
  target-info: register le and be TargetInfo variants
  target-info: add -target and program-name selection
  target-info: dispatch CPU QMP, dump, and Angel semihosting
  meson: link ARM and RISC-V into qemu-system

 MAINTAINERS                                   |   1 -
 accel/accel-common.c                          |  21 +-
 hw/arm/virt-acpi-build.c                      |   4 +-
 hw/arm/virt.c                                 |  14 +-
 hw/core/cpu-system.c                          |  23 +++
 hw/core/machine-qmp-cmds.c                    |  26 +++
 hw/loongarch/virt-acpi-build.c                |   6 +-
 hw/loongarch/virt.c                           |   2 +-
 hw/riscv/virt-acpi-build.c                    |   2 +-
 hw/riscv/virt.c                               |  12 +-
 include/accel/accel-cpu-target.h              |   3 +-
 include/accel/accel-cpu.h                     |   2 +
 include/hw/arm/virt.h                         |   6 +-
 include/hw/loongarch/virt.h                   |   2 +-
 include/hw/riscv/virt.h                       |   6 +-
 include/qemu/target-info-impl.h               |   6 +
 include/qemu/target-info-init.h               |  29 ++-
 include/qemu/target-info-qom.h                |  51 ++++-
 include/semihosting/common-semi.h             |  56 +++++-
 meson.build                                   | 156 ++++++++++++++-
 qemu-options.hx                               |  13 ++
 stubs/dump.c                                  |  27 ---
 stubs/meson.build                             |   2 -
 stubs/qmp-cpu.c                               |  21 --
 system/vl.c                                   |  28 ++-
 target-info-def.c                             |  61 ++++--
 target-info-qom.c                             | 180 +++++++++++++++++-
 target-info.c                                 |  32 ++++
 target/arm/arch_dump.c                        |   8 +-
 target/arm/arm-qmp-cmds.c                     |  15 +-
 target/arm/common-semi-target.c               |  23 ++-
 target/arm/meson.build                        |   7 +-
 target/i386/arch_dump.c                       |   8 +-
 target/i386/cpu-system.c                      |  12 +-
 target/i386/cpu.c                             |   6 +-
 target/loongarch/arch_dump.c                  |   8 +-
 target/loongarch/loongarch-qmp-cmds.c         |  15 +-
 target/mips/system/mips-qmp-cmds.c            |  15 +-
 target/ppc/arch_dump.c                        |   8 +-
 target/ppc/ppc-qmp-cmds.c                     |  15 +-
 target/riscv/arch_dump.c                      |   8 +-
 target/riscv/common-semi-target.c             |  25 ++-
 target/riscv/cpu.c                            |  10 +
 target/riscv/helper.h                         |   6 +-
 target/riscv/meson.build                      |   4 +-
 target/riscv/riscv-qmp-cmds.c                 |  15 +-
 target/riscv/tcg/bitmanip_helper.c            |   4 +-
 .../tcg/insn_trans/trans_privileged.c.inc     |   2 +-
 target/riscv/tcg/insn_trans/trans_xlrbr.c.inc |   4 +-
 target/riscv/tcg/op_helper.c                  |   2 +-
 target/s390x/arch_dump.c                      |   8 +-
 target/s390x/cpu_models_system.c              |  15 +-
 tests/qtest/fuzz/fuzz.c                       |   2 +-
 53 files changed, 809 insertions(+), 228 deletions(-)
 delete mode 100644 stubs/dump.c
 delete mode 100644 stubs/qmp-cpu.c

-- 
2.52.0.windows.1
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