Re: [PATCH 16/26] hw/rtc: Add PolarFire SoC RTC model

Conor Dooley <[email protected]> Thu, 23 Jul 2026 16:28:36 +0100
Newsgroups org.nongnu.qemu-riscv,org.nongnu.qemu-devel
Message-ID <20260723-seducing-plunging-ef7d4c60d917@spud>
On Thu, Jul 23, 2026 at 11:18:43PM +0800, Bin Meng wrote:
> The PolarFire SoC exposes an RTC with binary and calendar modes,
> programmable prescaling, alarms, and wakeup and match interrupts.
> 
> Add a standalone device model with explicit MMIO handling for time,
> commands, alarms, interrupt state, reset, and migration. Add its
> Kconfig and Meson entries and list it under the PolarFire SoC
> maintainer section.
> 
> Signed-off-by: Bin Meng <[email protected]>
> +
> +#define RTC_REG(offset) ((offset) / sizeof(uint32_t))
> +
> +static uint64_t mchp_pfsoc_rtc_get_count(MchpPfSoCRtcState *s)
> +{
> +    if (!s->running) {
> +        return s->frozen_count;
> +    }
> +
> +    return s->tick_offset +
> +           qemu_clock_get_ns(rtc_clock) / NANOSECONDS_PER_SECOND;
> +}

Just to be sure, this is done to match the hardware's behaviour of
resetting the count when the device is power cycled?

> +
> +static void mchp_pfsoc_rtc_set_count(MchpPfSoCRtcState *s, uint64_t count)
> +{
> +    if (s->running) {
> +        s->tick_offset = (int64_t)count -
> +            qemu_clock_get_ns(rtc_clock) / NANOSECONDS_PER_SECOND;
> +    } else {
> +        s->frozen_count = count;
> +    }
> +}
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