Re: [PATCH 03/56] disas/riscv: Use signed type for vector immediates

On Sun, 2026-08-09 at 15:34 -0700, Richard Henderson wrote:
> From: TANG Tiancheng <[email protected]>
> 
> operand_vimm() sign-extends the 5-bit vector immediate field in bits
> 19:15, but returns uint32_t. This sends negative immediates through
> an
> unsigned type before they are assigned to rv_decode.imm.
> 
> Return int32_t to match the signed value extracted by the helper.
> 
> Signed-off-by: TANG Tiancheng <[email protected]>
> Reviewed-by: LIU Zhiwei <[email protected]>
> Message-Id:
> <20260703-b4-disas-xthead-fix-riscv-next-v4-3-84c566330bc7@linux.alib
> aba.com>

Reviewed-by: Alistair Francis <[email protected]>

Alistair

> ---
>  disas/riscv.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/disas/riscv.c b/disas/riscv.c
> index fdf75a12ef..967739bdbb 100644
> --- a/disas/riscv.c
> +++ b/disas/riscv.c
> @@ -4487,7 +4487,7 @@ static uint32_t operand_cimmq(rv_inst inst)
>          ((inst << 57) >> 62) << 6;
>  }
>  
> -static uint32_t operand_vimm(rv_inst inst)
> +static int32_t operand_vimm(rv_inst inst)
>  {
>      return (int64_t)(inst << 44) >> 59;
>  }