Re: [PATCH 30/56] disas/riscv: Break pseudo loop for jal and jalr

Alistair <[email protected]>
Newsgroups org.nongnu.qemu-riscv,org.nongnu.qemu-devel
Message-ID <[email protected]>
On Sun, 2026-08-09 at 15:35 -0700, Richard Henderson wrote:
> These were clearly intending to simplify
> 	jal	ra, foo
> to
> 	jal	foo
> and similarly for jalr, but the pseudo expansion looped
> back to the original jal/jalr with the full format.
> 
> Add new opcode expansions dropping the implied ra.
> 
> Signed-off-by: Richard Henderson <[email protected]>

Reviewed-by: Alistair Francis <[email protected]>

Alistair

> ---
>  disas/riscv.c | 16 +++++++++-------
>  1 file changed, 9 insertions(+), 7 deletions(-)
> 
> diff --git a/disas/riscv.c b/disas/riscv.c
> index d3cbfb86ac..fe503b6cae 100644
> --- a/disas/riscv.c
> +++ b/disas/riscv.c
> @@ -326,6 +326,8 @@ typedef enum {
>      rv_op_bgez = 295,
>      rv_op_bltz = 296,
>      rv_op_bgtz = 297,
> +    rv_op_jal_ra = 298,
> +    rv_op_jalr_ra = 299,
>      rv_op_j = 302,
>      rv_op_ret = 303,
>      rv_op_jr = 304,
> @@ -1029,9 +1031,9 @@ static const char rv_fli_name_const[32][9] =
>  
>  /* pseudo-instruction constraints */
>  
> -static const rvc_constraint rvcc_jal[] = { rvc_rd_eq_ra, rvc_end };
> -static const rvc_constraint rvcc_jalr[] = { rvc_rd_eq_ra,
> rvc_imm_eq_zero,
> -                                            rvc_end };
> +static const rvc_constraint rvcc_jal_ra[] = { rvc_rd_eq_ra, rvc_end
> };
> +static const rvc_constraint rvcc_jalr_ra[] = { rvc_rd_eq_ra,
> rvc_imm_eq_zero,
> +                                               rvc_end };
>  static const rvc_constraint rvcc_nop[] = { rvc_rd_eq_x0,
> rvc_rs1_eq_x0,
>                                             rvc_imm_eq_zero, rvc_end
> };
>  static const rvc_constraint rvcc_mv[] = { rvc_imm_eq_zero, rvc_end
> };
> @@ -1068,14 +1070,14 @@ static const rvc_constraint rvcc_jr[] = {
> rvc_rd_eq_x0, rvc_imm_eq_zero,
>  
>  static const rv_comp_data rvcp_jal[] = {
>      { rv_op_j, rvcc_j },
> -    { rv_op_jal, rvcc_jal },
> +    { rv_op_jal_ra, rvcc_jal_ra },
>      { rv_op_illegal, NULL }
>  };
>  
>  static const rv_comp_data rvcp_jalr[] = {
>      { rv_op_ret, rvcc_ret },
>      { rv_op_jr, rvcc_jr },
> -    { rv_op_jalr, rvcc_jalr },
> +    { rv_op_jalr_ra, rvcc_jalr_ra },
>      { rv_op_illegal, NULL }
>  };
>  
> @@ -1884,8 +1886,8 @@ static const rv_opcode_data rvi_opcode_data[] =
> {
>      { "bgez", rv_codec_sb, rv_fmt_rs1_offset },
>      { "bltz", rv_codec_sb, rv_fmt_rs1_offset },
>      { "bgtz", rv_codec_sb, rv_fmt_rs2_offset },
> -    { },
> -    { },
> +    { "jal", rv_codec_none, rv_fmt_offset }, /* rv_op_jal_ra */
> +    { "jalr", rv_codec_none, rv_fmt_rs1 }, /* rv_op_jalr_ra */
>      { },
>      { },
>      { "j", rv_codec_uj, rv_fmt_offset },
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