[PATCH v2 0/2] Add Model for Tenstorrent Atlantis PRCM
Anirudh Srinivasan <[email protected]>
| Newsgroups | org.nongnu.qemu-riscv,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
This series adds a qemu model for the PRCM blocks present in Tenstorrent Atlantis. This block controls clock, reset and other misc functionality in the SoC. Linux support for the Clocks/Resets served by the RCPU PRCM was added in [1]. This PRCM model has been tested with a linux DT that enables the PRCM and sets the UART clk to the one provided by the PRCM. This DT will be sent out shortly. [1] https://lore.kernel.org/linux-riscv/[email protected]/ Signed-off-by: Anirudh Srinivasan <[email protected]> --- Changes in v2: - Coding style edits based on Chao Liu's feedback - Changed prcm to use Resettable inferface instead of legacy reset - Edits requested by Daniel related to tracing, pll_en logic and unnecessary switch/case statement - Added comments to some of the magic numbers in the reset values for PRCM registers - Link to v1: https://lore.kernel.org/qemu-devel/[email protected] --- Anirudh Srinivasan (2): hw/misc: Add Tenstorrent Atlantis PRCM model hw/riscv/tt-atlantis: Add PRCMs to tt-atlantis model MAINTAINERS | 2 + docs/system/riscv/tt_atlantis.rst | 1 + hw/misc/meson.build | 1 + hw/misc/trace-events | 4 + hw/misc/tt_atlantis_prcm.c | 442 +++++++++++++++++++++++++++++++++++++ hw/riscv/tt_atlantis.c | 94 ++++++++ include/hw/misc/tt_atlantis_prcm.h | 51 +++++ include/hw/riscv/tt_atlantis.h | 19 ++ 8 files changed, 614 insertions(+) --- base-commit: 499039798cdad7d86b787fec0eaf1da4151c0f05 change-id: 20260727-atlantis_prcm-b642cfb37d57 Best regards, -- Anirudh Srinivasan <[email protected]>