[PATCH v2] tests/tcg/riscv64: Add tests for rv128 [ms]status

[email protected]
Newsgroups org.nongnu.qemu-riscv,org.nongnu.qemu-devel
Message-ID <[email protected]>
From: Frédéric Pétrot <[email protected]>

Adding asm tests to check that mstatus and sstatus are updated as
expected in an rv128 cpu.

Signed-off-by: Frédéric Pétrot <[email protected]>
Reviewed-by: Daniel Henrique Barboza <[email protected]>
---
 tests/tcg/riscv64/Makefile.softmmu-target |   9 ++
 tests/tcg/riscv64/test-rv128-mstatus.S    |  67 ++++++++++++++
 tests/tcg/riscv64/test-rv128-sstatus.S    | 108 ++++++++++++++++++++++
 3 files changed, 184 insertions(+)
 create mode 100644 tests/tcg/riscv64/test-rv128-mstatus.S
 create mode 100644 tests/tcg/riscv64/test-rv128-sstatus.S

diff --git a/tests/tcg/riscv64/Makefile.softmmu-target b/tests/tcg/riscv64/Makefile.softmmu-target
index 6a219c306c..575571de90 100644
--- a/tests/tcg/riscv64/Makefile.softmmu-target
+++ b/tests/tcg/riscv64/Makefile.softmmu-target
@@ -71,5 +71,14 @@ EXTRA_RUNS += run-test-misa-w
 run-test-misa-w: test-misa-w
 	$(call run-test, $<, $(QEMU) -cpu rv64$(comma)x-misa-w=true$(comma)c=true$(comma)v=true $(QEMU_OPTS)$<)
 
+# Test for rv128
+EXTRA_RUNS += run-test-rv128-mstatus
+run-test-rv128-mstatus: test-rv128-mstatus
+	$(call run-test, $<, $(QEMU) -cpu x-rv128 $(QEMU_OPTS)$<)
+
+EXTRA_RUNS += run-test-rv128-sstatus
+run-test-rv128-sstatus: test-rv128-sstatus
+	$(call run-test, $<, $(QEMU) -cpu x-rv128 $(QEMU_OPTS)$<)
+
 # We don't currently support the multiarch system tests
 undefine MULTIARCH_TESTS
diff --git a/tests/tcg/riscv64/test-rv128-mstatus.S b/tests/tcg/riscv64/test-rv128-mstatus.S
new file mode 100644
index 0000000000..323f65ef90
--- /dev/null
+++ b/tests/tcg/riscv64/test-rv128-mstatus.S
@@ -0,0 +1,67 @@
+/*
+ * Test rv128 mstatus update and access
+ * Author: Frédéric Pétrot <[email protected]>
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#define srli(rd, rs1, imm)                .insn i  0b0010011, 0b101, rd, rs1, imm & 0b1111111
+
+    .option norvc
+
+    .text
+    .globl _start
+_start:
+    csrr    s0, misa
+    srli    (s1, s0, 126)
+    li      s0, 3
+    bne     s1, s0, fail
+
+    # Check UXL and SXL are set to RV128 too
+    csrr    s0, mstatus
+    srli    (s1, s0, 32)
+    andi    s1, s1, 0xf
+    li      s0, 0xf
+    bne     s1, s0, fail
+
+    # Mark FPU dirty to check for SD
+    .equiv  MSTATUS_FS, 0x00006000
+    li      s0, MSTATUS_FS
+    csrs    mstatus, s0
+    # Do some useless computation
+    fmadd.s f3, f2, f1, f0
+    fmax.s  f0, f1, f2
+    # Check SD has changed where expected
+    csrr    s0, mstatus
+    srli    (s1, s0, 127)
+    li      s0, 1
+    bne     s1, s0, fail
+    # Mark FPU clean (2 in FS place)
+    li      s0, ~0x00004000
+    csrc    mstatus, s0
+    csrr    s0, mstatus
+    srli    (s1, s0, 13)
+    andi    s1, s1, 3
+    li      s0, 2
+    bne     s1, s0, fail
+    li      a0, 0
+    j       _exit
+fail:
+    li      a0, 1
+_exit:
+    lla     a1, semiargs
+    li      t0, 0x20026 # ADP_Stopped_ApplicationExit
+    sd      t0, 0(a1)
+    sd      a0, 8(a1)
+    li      a0, 0x20    # TARGET_SYS_EXIT_EXTENDED
+
+    # Semihosting call sequence
+    .balign 16
+    slli   zero, zero, 0x1f
+    ebreak
+    srai   zero, zero, 0x7
+    j      .
+
+    .data
+    .balign 16
+semiargs:
+    .space  16
diff --git a/tests/tcg/riscv64/test-rv128-sstatus.S b/tests/tcg/riscv64/test-rv128-sstatus.S
new file mode 100644
index 0000000000..af118e355a
--- /dev/null
+++ b/tests/tcg/riscv64/test-rv128-sstatus.S
@@ -0,0 +1,108 @@
+/*
+ * Test rv128 sstatus update and access
+ * Author: Frédéric Pétrot <[email protected]>
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+#define srli(rd, rs1, imm)                .insn i  0b0010011, 0b101, rd, rs1, imm & 0b1111111
+
+    .option norvc
+
+    .text
+    .globl _start
+_start:
+    // Check RV128 is running
+    csrr     s0, misa
+    srli     (s1, s0, 126)
+    li       s0, 3
+    bne      s1, s0, fail
+
+    // Minimal pmp settings
+#define PMP_NAPOT 0x18
+#define PMP_R     0x01
+#define PMP_W     0x02
+#define PMP_X     0x04
+
+    li       s0, -1
+    csrw     pmpaddr0, s0
+    li       s0, PMP_NAPOT | PMP_R | PMP_W | PMP_X
+    csrw     pmpcfg0, s0
+
+    la       s0, backm
+    csrw     mtvec, s0
+
+    // Set MPP to supervisor
+    csrr     s0, mstatus
+    li       s1, ~0x1800 // mask
+    and      s1, s1, s0
+    li       s0, 0x0800  // supervisor
+    or       s1, s1, s0
+    csrw     mstatus, s1
+    // Change to supervisor mode
+    la       s0, 1f
+    csrw     mepc, s0
+    mret
+1:
+    // Check UXL is set to RV128
+    csrr     s0, sstatus
+    srli     (s1, s0, 32)
+    andi     s1, s1, 0x3
+    li       s0, 3
+    bne      s1, s0, fail
+    // Check SPP if is set to 1, since we
+    // come from machine mode
+    srli     (s1, s0, 8)
+    andi     s1, s1, 0x1
+    // Actually this check fails, so test 0
+    li       s0, 0
+    bne      s1, s0, fail
+
+    // Mark FPU dirty to check for SD
+    .equiv   MSTATUS_FS, 0x00006000
+    li       s0,  MSTATUS_FS
+    csrs     sstatus, s0
+    // Do some fun useless computation
+    fmadd.s  f3, f2, f1, f0
+    fmax.s   f0, f1, f2
+    // Check SD has changed where expected
+    csrr     s0, sstatus
+    srli     (s1, s0, 127)
+    li       s0, 1
+    bne      s1, s0, fail
+    // Mark FPU clean (2 in FS place)
+    li       s0, ~0x00004000
+    csrc     sstatus, s0
+    csrr     s0, sstatus
+    srli     (s1, s0, 127)
+    li       s0, 0
+    bne      s1, s0, fail
+
+    // Let's go back to machine mode to exit
+    ecall
+
+    // mtvec bit 1:0 indicate mode, 00 is Direct, what
+    // we want in this simple test
+    .align 4
+backm:
+    li      a0, 0
+    j       _exit
+fail:
+    li      a0, 1
+_exit:
+    lla     a1, semiargs
+    li      t0, 0x20026 # ADP_Stopped_ApplicationExit
+    sd      t0, 0(a1)
+    sd      a0, 8(a1)
+    li      a0, 0x20    # TARGET_SYS_EXIT_EXTENDED
+
+    # Semihosting call sequence
+    .balign 16
+    slli   zero, zero, 0x1f
+    ebreak
+    srai   zero, zero, 0x7
+    j      .
+
+    .data
+    .balign 16
+semiargs:
+    .space  16
-- 
2.43.0
lmpx.com only provides a reader for public news (NNTP) servers. It is not affiliated with the servers or forums shown here and is not responsible for the content of articles, which is written by their respective authors.