Re: [PATCH] target/riscv: Fix PC sync in trans_sspopchk for CFI exception handling

On 7/30/26 21:18, A-Shehab wrote:
> From: Max Chou <[email protected]>
> 
> Move gen_update_pc call before conditional logic to ensure consistent
> PC state regardless of execution path.
> 
> Previously, the host instructions generated to update the cpu_pc were
> only executed in the failure path when shadow stack validation failed.
> This created inconsistent PC synchronization.
> 
> This inconsistency caused issues in CF_PCREL mode where subsequent
> instructions calculated wrong relative offsets from stale pc_save
> values, and could lead to incorrect exception return addresses.
> 
> This fix ensures PC is always synchronized before any helper that
> might raise an exception, maintaining consistent translator state
> across all execution paths.
> 
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/4118
> Signed-off-by: Max Chou <[email protected]>
> [ahshehab: rebased on current master; file moved to
>   target/riscv/tcg/insn_trans/ and the ssp load is now 64-bit wide]
> Tested-by: A-Shehab <[email protected]>
> Signed-off-by: A-Shehab <[email protected]>

I'm applying this to the current qemu stable series.
In 11.0.x and 10.0.x, it is the original version of this patch
(though maybe it is more productive to pick up other changes in
this area to older stable branches and apply this change as-is).

Please let me know if I shouldn't pick it up.

Thanks,

/mjt