Re: [Intel-wired-lan] [PATCH iwl-net v3] ice: fall back to SBQ when LL PHY timer interface times out
"Loktionov, Aleksandr" <[email protected]> Thu, 23 Jul 2026 09:22:15 +0000
| Newsgroups | org.osuosl.intel-wired-lan,org.kernel.vger.netdev |
|---|---|
| Message-ID | <IA3PR11MB89862E31E3D1617D6A52231CE5C02@IA3PR11MB8986.namprd11.prod.outlook.com> |
> -----Original Message----- > From: Intel-wired-lan <[email protected]> On Behalf > Of Przemyslaw Korba > Sent: Friday, June 5, 2026 2:06 PM > To: [email protected] > Cc: [email protected]; Nguyen, Anthony L > <[email protected]>; Kitszel, Przemyslaw > <[email protected]>; Ilichev, Konstantin > <[email protected]>; Lobakin, Aleksander > <[email protected]>; Korba, Przemyslaw > <[email protected]> > Subject: [Intel-wired-lan] [PATCH iwl-net v3] ice: fall back to SBQ > when LL PHY timer interface times out > > The low-latency (LL) PHY timer interface relies on a tight, atomic > poll of the PF_SB_ATQBAL register with a 2ms timeout. After an NVM > update / EMPR, FW may need significantly longer than 2ms to start > responding to ATQBAL commands. The first PHY adjust or incval write > issued by > ice_ptp_rebuild_owner() fails with -ETIMEDOUT. > > Fix this by falling back to the existing SBQ-based PHY register write > path when LL times out. This makes sure PTP is initialized when FW > takes longer than expected to come back online. > > Steps to reproduce: > ./nvmupdate64e -if devlink -f > Update E810 card with nvmupdate64e, and observe dmesg errors: > Failed to write PHC increment value, status -110 > PTP reset failed, error: -110 (-ETIMEDOUT) > > Fixes: ef9a64c07294 ("ice: implement low latency PHY timer updates") > Signed-off-by: Przemyslaw Korba <[email protected]> > --- > v3: > * actually add TIMEDOUT check in ice_prep_phy_adj_e810 (did do it) > v2: > * add TIMEDOUT check in ice_prep_phy_adj_e810 (did not do it) > https://lore.kernel.org/intel-wired-lan/20260603114904.1297713-1- > [email protected]/ > v1: > https://lore.kernel.org/intel-wired-lan/20260511095830.1095984-1- > [email protected]/ > --- > drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 38 +++++++++++--------- > - > 1 file changed, 20 insertions(+), 18 deletions(-) > > diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c > b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c > index d47d5baf3281..e77c7f2b5575 100644 > --- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c > +++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c > @@ -4789,15 +4789,12 @@ static int ice_ptp_prep_phy_adj_ll_e810(struct > ice_hw *hw, s32 adj) > !FIELD_GET(REG_LL_PROXY_H_EXEC, > val), > 10, REG_LL_PROXY_H_TIMEOUT_US, > false, hw, > REG_LL_PROXY_H); > - if (err) { > - ice_debug(hw, ICE_DBG_PTP, "Failed to prepare PHY timer > adjustment using low latency interface\n"); > - spin_unlock_irq(¶ms->atqbal_wq.lock); > - return err; > - } > - > spin_unlock_irq(¶ms->atqbal_wq.lock); > > - return 0; > + if (err) > + ice_debug(hw, ICE_DBG_PTP, "Failed to prepare PHY timer > adjustment > +using low latency interface\n"); > + > + return err; > } > > /** > @@ -4818,8 +4815,12 @@ static int ice_ptp_prep_phy_adj_e810(struct > ice_hw *hw, s32 adj) > u8 tmr_idx; > int err; > > - if (hw->dev_caps.ts_dev_info.ll_phy_tmr_update) > - return ice_ptp_prep_phy_adj_ll_e810(hw, adj); > + if (hw->dev_caps.ts_dev_info.ll_phy_tmr_update) { > + err = ice_ptp_prep_phy_adj_ll_e810(hw, adj); > + if (err != -ETIMEDOUT) > + return err; > + ice_debug(hw, ICE_DBG_PTP, "LL adj timed out, falling > back to SBQ\n"); > + } > > tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned; > > @@ -4882,15 +4883,12 @@ static int > ice_ptp_prep_phy_incval_ll_e810(struct ice_hw *hw, u64 incval) > !FIELD_GET(REG_LL_PROXY_H_EXEC, > val), > 10, REG_LL_PROXY_H_TIMEOUT_US, > false, hw, > REG_LL_PROXY_H); > - if (err) { > - ice_debug(hw, ICE_DBG_PTP, "Failed to prepare PHY timer > increment using low latency interface\n"); > - spin_unlock_irq(¶ms->atqbal_wq.lock); > - return err; > - } > - > spin_unlock_irq(¶ms->atqbal_wq.lock); > > - return 0; > + if (err) > + ice_debug(hw, ICE_DBG_PTP, "Failed to prepare PHY timer > increment > +using low latency interface\n"); > + > + return err; > } > > /** > @@ -4908,8 +4906,12 @@ static int ice_ptp_prep_phy_incval_e810(struct > ice_hw *hw, u64 incval) > u8 tmr_idx; > int err; > > - if (hw->dev_caps.ts_dev_info.ll_phy_tmr_update) > - return ice_ptp_prep_phy_incval_ll_e810(hw, incval); > + if (hw->dev_caps.ts_dev_info.ll_phy_tmr_update) { > + err = ice_ptp_prep_phy_incval_ll_e810(hw, incval); > + if (err != -ETIMEDOUT) > + return err; > + ice_debug(hw, ICE_DBG_PTP, "LL incval timed out, falling > back to SBQ\n"); > + } > > tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned; > low = lower_32_bits(incval); > > base-commit: 2d72c95ac8e2d1abccf671d95b94532a8b2abb24 > -- > 2.43.0 Reviewed-by: Aleksandr Loktionov <[email protected]>