[PATCH v2] ARM: dts: aspeed: g6: Add missing uart nodes
Jammy Huang <[email protected]> Thu, 23 Jul 2026 11:48:34 +0800
| Newsgroups | org.ozlabs.lists.linux-aspeed,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel |
|---|---|
| Message-ID | <[email protected]> |
Add nodes for uart10/11/12/13. Signed-off-by: Jammy Huang <[email protected]> --- Changes in v2: - rebase on bmc/linux.git aspeed/arm/dt, no functional changes - Link to v1: https://lore.kernel.org/r/[email protected] --- arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 56 +++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi index edf4b74f5ab..fb21e353005 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi @@ -844,6 +844,62 @@ uart9: serial@1e790300 { status = "disabled"; }; + uart10: serial@1e790400 { + compatible = "ns16550a"; + reg = <0x1e790400 0x20>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_GATE_UART10CLK>; + no-loopback-test; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart10_default>; + + status = "disabled"; + }; + + uart11: serial@1e790500 { + compatible = "ns16550a"; + reg = <0x1e790500 0x20>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_GATE_UART11CLK>; + no-loopback-test; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart11_default>; + + status = "disabled"; + }; + + uart12: serial@1e790600 { + compatible = "ns16550a"; + reg = <0x1e790600 0x20>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_GATE_UART12CLK>; + no-loopback-test; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart12g1_default>; + + status = "disabled"; + }; + + uart13: serial@1e790700 { + compatible = "ns16550a"; + reg = <0x1e790700 0x20>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon ASPEED_CLK_GATE_UART13CLK>; + no-loopback-test; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart13g1_default>; + + status = "disabled"; + }; + bus@1e78a000 { compatible = "simple-bus"; #address-cells = <1>; --- base-commit: 749c34389679f8d56cb200a69b62f9a64670034f change-id: 20260327-upstream_g6_dts_uart-78a5ce3b2873 Best regards, -- Jammy Huang <[email protected]>