Re: [PATCH v2 2/2] ARM: dts: aspeed-g6: add pcie-kcs4

On Wed, 2026-07-22 at 15:11 +0000, Gr=C3=A9goire Layet wrote:
> Add pcie_kcs4 node to the LPC bus in the ast2600 g6 common dtsi.
>=20
> The ASPEED AST2600 has a PCIe to LPC controller. It includes a KCS
> interface on channel 4. This is a fully KCS-compatible interface
> that is exposed over PCIe.
>=20
> This can be used by the host for IPMI when the PCIe BMC Device is
> activated.
>=20
> While the datasheet provides interrupt numbers for KCS channels 1, 2,
> 3 and 4 over PCI, not all 4 are described in the "PCIe to LPC Controller"
> section. Since only the KCS channel 4 is described, only this channel is
> added.
>=20
> The pcie_kcs4 uses existing "aspeed,ast2600-kcs-bmc" compatible as it's a
> standard KCS interface.
>=20
> Signed-off-by: Gr=C3=A9goire Layet <[email protected]>
> ---
> =C2=A0arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 7 +++++++
> =C2=A01 file changed, 7 insertions(+)
>=20
> diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/=
aspeed/aspeed-g6.dtsi
> index 56bb3b0444f7..a93fa4cf5d8f 100644
> --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
> +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi
> @@ -617,6 +617,13 @@ kcs4: kcs@114 {
> =C2=A0					status =3D "disabled";
> =C2=A0				};
> =C2=A0
> +				pcie_kcs4: kcs@914 {

Nodes need to be ordered by ascending address:

https://docs.kernel.org/devicetree/bindings/dts-coding-style.html#order-of-=
nodes

Note that we now have scripts/dtc/dt-check-style which can help catch
such issues.

Andrew