[PATCH u-boot 0/1] aspeed: msx4: switch phy-mode to rgmii-id
Ender Hsieh <[email protected]>
| Newsgroups | org.ozlabs.lists.openbmc |
|---|---|
| Message-ID | <[email protected]> |
Following Aspeed (Jacky Chou) and Andrew Lunn's guidance on linux-aspeed [1], switch the MSX4 board to phy-mode = "rgmii-id" so the PHY handles internal RX/TX delay, and remove the SCU mac0-clk-delay block since SoC-side delay is no longer needed. A coordinated kernel-side change adding the &mac0/&mdio3 nodes with phy-mode = "rgmii-id" to aspeed-bmc-nvidia-msx4-bmc.dts will be sent to mainline Linux separately. Tested on alon8 hardware: 1G link negotiation succeeds with this change in coordination with the kernel-side patch. [1] https://lore.kernel.org/linux-aspeed/[email protected]/ Ender Hsieh (1): ARM: dts: ast2600 msx4: switch to rgmii-id phy mode arch/arm/dts/ast2600-msx4-bmc-nvidia.dts | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) -- 2.34.1