[PATCH 1/2] arm: mediatek: use phase-aware PSCI reset on MT8365
David Lechner <[email protected]>
| Newsgroups | org.u-boot-project.lists.u-boot |
|---|---|
| Message-ID | <20260731-mtk-mach-phase-aware-reset-v1-1-90b918aa52f5@baylibre.com> |
Change IS_ENABLED() to CONFIG_IS_ENABLED() to prepare for SPL support. PSCI is not available in the SPL stage and would cause a lock-up if called. Signed-off-by: David Lechner <[email protected]> --- arch/arm/mach-mediatek/mt8365/init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-mediatek/mt8365/init.c b/arch/arm/mach-mediatek/mt8365/init.c index 1063dbf72a9..0f990197a38 100644 --- a/arch/arm/mach-mediatek/mt8365/init.c +++ b/arch/arm/mach-mediatek/mt8365/init.c @@ -22,7 +22,7 @@ void reset_cpu(void) { struct udevice *wdt; - if (IS_ENABLED(CONFIG_PSCI_RESET)) { + if (CONFIG_IS_ENABLED(PSCI_RESET)) { psci_system_reset(); } else { uclass_first_device(UCLASS_WDT, &wdt); -- 2.43.0