[PATCH 2/2] arm: mediatek: use phase-aware PSCI reset on MT8195

David Lechner <[email protected]>
Newsgroups org.u-boot-project.lists.u-boot
Message-ID <20260731-mtk-mach-phase-aware-reset-v1-2-90b918aa52f5@baylibre.com>
Change IS_ENABLED() to CONFIG_IS_ENABLED() to prepare for SPL support.
PSCI is not available in the SPL stage and would cause a lock-up if
called.

Signed-off-by: David Lechner <[email protected]>
---
 arch/arm/mach-mediatek/mt8195/init.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-mediatek/mt8195/init.c b/arch/arm/mach-mediatek/mt8195/init.c
index 83cac9d01d6..6afb7330b4e 100644
--- a/arch/arm/mach-mediatek/mt8195/init.c
+++ b/arch/arm/mach-mediatek/mt8195/init.c
@@ -38,7 +38,7 @@ void reset_cpu(void)
 {
 	struct udevice *wdt;
 
-	if (IS_ENABLED(CONFIG_PSCI_RESET)) {
+	if (CONFIG_IS_ENABLED(PSCI_RESET)) {
 		psci_system_reset();
 	} else {
 		uclass_first_device(UCLASS_WDT, &wdt);

-- 
2.43.0
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