[gcc r17-3512] aarch64: Add `SME_MOP4` predefines

https://gcc.gnu.org/g:687920eb626703c02a7f3a800512eb2db2fc3bf0

commit r17-3512-g687920eb626703c02a7f3a800512eb2db2fc3bf0
Author: Karl Meakin <[email protected]>
Date:   Thu Dec 4 17:36:15 2025 +0000

    aarch64: Add `SME_MOP4` predefines
    
    Add the `__ARM_FEATURE_SME_MOP4` feature test macro, and a test checking
    that it is correctly defined. The `+sme-mop4` flag itself was added
    earlier, but the feature test macro and documentation weren't added.
    
    gcc/ChangeLog:
    
            * doc/invoke.texi: Document new extension flags.
            * config/aarch64/aarch64.h (TARGET_SME_MOP4): New target macro.
            * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Define
            `__ARM_FEATURE_SME_MOP4` macros when the relevant extension is enabled.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/aarch64/pragma_cpp_predefs_4.c: Test that
            `__ARM_FEATURE_SME_F8F16`, `__ARM_FEATURE_SME_F8F32`
            and `__ARM_FEATURE_SME_MOP4` macros are defined when the
            relevant extension is enabled.
            * lib/target-supports.exp: Add `sme-mop4` to `exts`.

Diff:
---
 gcc/config/aarch64/aarch64-c.cc                         | 2 ++
 gcc/config/aarch64/aarch64.h                            | 2 ++
 gcc/doc/invoke.texi                                     | 3 +++
 gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c | 7 +++++++
 gcc/testsuite/lib/target-supports.exp                   | 2 +-
 5 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/gcc/config/aarch64/aarch64-c.cc b/gcc/config/aarch64/aarch64-c.cc
index 482c796d6390..f392ac8ee795 100644
--- a/gcc/config/aarch64/aarch64-c.cc
+++ b/gcc/config/aarch64/aarch64-c.cc
@@ -317,6 +317,8 @@ aarch64_update_cpp_builtins (cpp_reader *pfile)
 			"__ARM_FEATURE_SME_F16F16", pfile);
   aarch64_def_or_undef (TARGET_SME_F64F64, "__ARM_FEATURE_SME_F64F64", pfile);
   aarch64_def_or_undef (TARGET_SME2, "__ARM_FEATURE_SME2", pfile);
+  aarch64_def_or_undef (AARCH64_HAVE_ISA (SME_MOP4), "__ARM_FEATURE_SME_MOP4",
+			pfile);
   aarch64_def_or_undef (AARCH64_HAVE_ISA (SME2p1),
 			"__ARM_FEATURE_SME2p1", pfile);
   aarch64_def_or_undef (TARGET_SME2p2, "__ARM_FEATURE_SME2p2", pfile);
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index 11fb7a9481ea..6e16c1ca5854 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -511,6 +511,8 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE ATTRIBUTE_UNUSED
    elements are enabled through +sme-lutv2.  */
 #define TARGET_SME_LUTv2 AARCH64_HAVE_ISA (SME_LUTv2)
 
+#define TARGET_SME_MOP4 (AARCH64_HAVE_ISA (SME_MOP4) && TARGET_STREAMING)
+
 /* Prefer different predicate registers for the output of a predicated
    operation over re-using an existing input predicate.  */
 #define TARGET_SVE_PRED_CLOBBER (TARGET_SVE \
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 8f176d200d31..91d3046d7ca1 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -22077,6 +22077,9 @@ and SVE_B16B16 instructions.
 @item sme-f16f16
 Enable the FEAT_SME_F16F16 extension to SME.  This also enables SME2
 instructions.
+@item sme-mop4
+Enable the FEAT_SME_MOP4 extension to SME.  This also enables SME2
+instructions.
 @item sme2p1
 Enable the Scalable Matrix Extension version 2.1.  This also enables SME2
 instructions.
diff --git a/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c b/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c
index 1d6acc93bd17..4caa01bba0f8 100644
--- a/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c
+++ b/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c
@@ -231,6 +231,13 @@
 #ifndef __ARM_FEATURE_SME2p2
 #error Foo
 #endif
+#pragma GCC target "+nothing+sve2+sme-mop4"
+#ifndef __ARM_FEATURE_SME_MOP4
+#error "__ARM_FEATURE_SME_MOP4 not defined"
+#endif
+#ifndef __ARM_FEATURE_SME2
+#error "__ARM_FEATURE_SME2 not defined"
+#endif
 
 #pragma GCC target "branch-protection=standard"
 #ifndef __ARM_FEATURE_BTI_DEFAULT
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 5beec1c45ebc..1eef8fcbdaad 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -13101,7 +13101,7 @@ set exts {
     "sme-b16b16" "sme-f16f16" "sme-i16i64" "sme" "sme2" "sme2p1" "sme2p2"
     "sme2p3"
     "ssve-fp8dot2" "ssve-fp8dot4" "ssve-fp8fma" "sve-bfscale" "sme-lutv2"
-    "ssve-fexpa" "ssve-bitperm" "ssve-aes"
+    "ssve-fexpa" "ssve-bitperm" "ssve-aes" "sme-mop4"
 }
 
 foreach { aarch64_ext } $exts {