Unbuffered SDRAM [forwarded from Soban]
Mohamed Eldesoky <[email protected]> Wed, 10 Sep 2003 11:02:56 +0300
| Newsgroups | gmane.org.handasarabia.ofoq |
|---|---|
| Organization | Handasa Arabia |
| Message-ID | <[email protected]> |
Salaam All,
PC Unbuffered SDRAM DIMM Specs specify many things like mechanical
parameters, PCB track information...etc
But things important for us are:
The organisation of the SDRAM,configuration (how the SDRAMs are
interconnected).
The SOPC mentions that it supports PC Unbuffered SDRAM DIMM
Specification configurations 8 and 9.
In the PC SDRAM Unbuffered DIMM specs the configuration 8 and 9
will give you following information.
(You'll find the specs at
www.intel.com/technology/memory/UNB_001.htm )
+--------+-------------------------------------------------------
|Cfg#|DIMM DIMM SDRAM SDRAM # of #Rows of # Banks in
| |Capty Orgzn density Orgzn SDRAMs SDRAM SDRAM
+----------------------------------------------------------------
|8 |64 MB 8M X 64 64 Mbit 4MX16 8 2 4
|9 |64 MB 8M X 64 64 Mbit 8MX8 8 1 4
+----+-----------------------------------------------------------
----+----------------+
Cfg#|# Address bits |
| row/bank/col| |
----+----------------+
8 | 12/2/8 |
9 | 12/2/9 |
----+----------------+
And the block diagram for these configurations is also given.
I have drawn one of the pairs of Configuration #8.
similiarly there are 3 more pairs of SDRAMs for data lines
(16-31), (32-47) and (48-63)
Here point to note is that both the SDRAMs are connected to same
data lines and Data mask lines but diffe
erent Chip selects.
I hope now there is no confusion on the No.of Address lines and
the memory size.
cs0 cs1
| |
__|__ __|__
16 | | 16 | |
(0-15) data -----/----->| |--/->| |
| | | |
data mask----/----->| 1 |---->| 2 |
| | | |
| | | |
|_____| |_____|
We need to know which SDRAM DIMM is actually there on the SOPC
board(I mean the device number and Vendor), bcoz many SDRAM DIMM
will come under these specs and the specs don't tell anything
about the timing and operation, commands which are important for
us.
Also I agree with Jameel,SDRAM needs to be inintialised.
Moreover,
many of them also have powerOn sequence.
Hope it helps.
Regards,
-Soban.
-------------------------------
OFOQ Mailing List
Handasa Arabia Organization
http://www.handasarabia.org
[email protected]
Message number 97