Re: [PATCH 08/56] disas/riscv: Tidy dec initialization in disasm_inst
Alistair <[email protected]>
| Newsgroups | org.nongnu.qemu-riscv,org.nongnu.qemu-devel |
|---|---|
| Message-ID | <[email protected]> |
On Sun, 2026-08-09 at 15:34 -0700, Richard Henderson wrote: > Signed-off-by: Richard Henderson <[email protected]> Reviewed-by: Alistair Francis <[email protected]> Alistair > --- > disas/riscv.c | 9 +++++---- > 1 file changed, 5 insertions(+), 4 deletions(-) > > diff --git a/disas/riscv.c b/disas/riscv.c > index 012f90fce6..986dc6b752 100644 > --- a/disas/riscv.c > +++ b/disas/riscv.c > @@ -5441,10 +5441,11 @@ static void decode_inst_decompress(rv_decode > *dec, rv_isa isa) > static GString *disasm_inst(rv_isa isa, uint64_t pc, rv_inst inst, > const RISCVCPUConfig *cfg) > { > - rv_decode dec = { 0 }; > - dec.pc = pc; > - dec.inst = inst; > - dec.cfg = cfg; > + rv_decode dec = { > + .pc = pc, > + .inst = inst, > + .cfg = cfg, > + }; > > static const struct { > bool (*guard_func)(const RISCVCPUConfig *);