Re: [PATCH v2] dt-bindings: usb: Add Aspeed AST2700 DWC3 controller
Krzysztof Kozlowski <[email protected]> Mon, 13 Jul 2026 09:08:46 +0200
| Newsgroups | org.ozlabs.lists.linux-aspeed,org.infradead.lists.linux-arm-kernel,org.kernel.vger.linux-devicetree,org.kernel.vger.linux-kernel,org.kernel.vger.linux-usb,org.ozlabs.lists.openbmc |
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| Message-ID | <20260713-comical-kickass-anaconda-bfb0ca@quoll> |
On Fri, Jul 10, 2026 at 10:51:35AM +0800, Ryan Chen wrote: > The Aspeed AST2700 SoC integrates the Synopsys DesignWare USB3 core with > no vendor glue logic: it is functionally compatible with snps,dwc3, uses > the standard DWC3 clocks, and the only SoC-specific part is a USB3 PHY > that is handled by a separate driver. > > Add a dedicated binding document rather than adding the compatible and a > conditional to snps,dwc3.yaml. This follows the established per-vendor DWC3 > convention (apple,dwc3.yaml, socionext,uniphier-dwc3.yaml, ...) and keeps > the AST2700-specific constraints - notably the mandatory USB3 PHY - out of > the generic schema. > > Signed-off-by: Ryan Chen <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Best regards, Krzysztof