org.nongnu.qemu-arm archive
1115 archived articles, newest first (page 4 of 12). Latest articles →
[RFC v5 22/28] hw/arm/smmuv3: Harden security checks in MMIO handlers
Fri, 14 Aug 2026 00:26:21 +0800[RFC v5 09/28] hw/arm/smmu: Add PTE NS/NSTable helpers
Fri, 14 Aug 2026 00:24:45 +0800[RFC v5 16/28] hw/arm/smmuv3: Add access checks for GERROR_IRQ_CFG registers
Fri, 14 Aug 2026 00:25:54 +0800[RFC v5 10/28] hw/arm/smmuv3: Store CD NSCFG in TT info
Fri, 14 Aug 2026 00:24:46 +0800[RFC v5 21/28] hw/arm/smmuv3: Implement SMMU_S_INIT register
Fri, 14 Aug 2026 00:26:20 +0800[RFC v5 27/28] hw/arm/smmuv3: Add secure bank migration and secure-impl property
Fri, 14 Aug 2026 00:26:43 +0800[RFC v5 18/28] hw/arm/smmuv3: Add access checks for CMDQ and EVENTQ registers
Fri, 14 Aug 2026 00:25:56 +0800[RFC v5 25/28] hw/arm/smmuv3: Reject IOMMU notifiers for non-NS devices
Fri, 14 Aug 2026 00:26:23 +0800[RFC v5 24/28] hw/arm/smmuv3: Select sec-sid from PCI property and validate SECURE_IMPL
Fri, 14 Aug 2026 00:26:22 +0800[RFC v5 17/28] hw/arm/smmuv3: Add access checks for STRTAB_BASE and CR2 registers
Fri, 14 Aug 2026 00:25:55 +0800Re: [PATCH v2 01/10] target/arm: Tidy cpu_max_initfn
Wed, 12 Aug 2026 23:23:08 +0200Re: [PATCH v2 06/10] target/arm: Move aa32_max_features to tcg/cpu32.c
Wed, 12 Aug 2026 23:19:20 +0200Re: [PATCH v2 05/10] target/arm: Split out aarch32_max_tcg_init
Wed, 12 Aug 2026 23:18:28 +0200Re: [PATCH for-11.2] hw: add compat machines for 11.2
Wed, 12 Aug 2026 17:13:56 -0400[PATCH v2 08/10] target/arm: Use -cpu max-v8 with aarch64=off
Wed, 12 Aug 2026 13:44:33 -0700[PATCH v2 05/10] target/arm: Split out aarch32_max_tcg_init
Wed, 12 Aug 2026 13:44:30 -0700[PATCH v2 00/10] target/arm: Introduce cpu types max-v8 and max-v9
Wed, 12 Aug 2026 13:44:25 -0700[PATCH v2 02/10] target/arm: Pass ARMCPU to aarch64_aa32_a57_init
Wed, 12 Aug 2026 13:44:27 -0700[PATCH v2 09/10] target/arm: Annotate arch revisions in aarch64_max_tcg_initfn
Wed, 12 Aug 2026 13:44:34 -0700[PATCH v2 03/10] target/arm: Pass aarch64_enabled to aarch64_aa32_a57_init
Wed, 12 Aug 2026 13:44:28 -0700[PATCH v2 06/10] target/arm: Move aa32_max_features to tcg/cpu32.c
Wed, 12 Aug 2026 13:44:31 -0700[PATCH v2 07/10] target/arm: Introduce cpu types max-v8 and max-v9
Wed, 12 Aug 2026 13:44:32 -0700[PATCH v2 10/10] target/arm: Separate cpu types max-v8 and max-v9
Wed, 12 Aug 2026 13:44:35 -0700[PATCH v2 01/10] target/arm: Tidy cpu_max_initfn
Wed, 12 Aug 2026 13:44:26 -0700Re: [PATCH] hw/intc: Fix arm kvm gicv3 selection
Wed, 12 Aug 2026 22:28:20 +0200Re: [PATCH] hw/intc: Fix arm kvm gicv3 selection
Wed, 12 Aug 2026 13:27:33 -0700[PATCH] hw/intc: Fix arm kvm gicv3 selection
Wed, 12 Aug 2026 13:03:08 -0700Re: [PATCH 14/26] hw/sd: cadence: Advertise 64-bit system bus support
Thu, 13 Aug 2026 01:56:04 +1000Re: [RFC PATCH v1 1/5] hw/gpio: add stm32f1xx GPIO device model (Rust)
Thu, 13 Aug 2026 01:03:02 +1000Re: [PATCH for-11.2] hw: add compat machines for 11.2
Wed, 12 Aug 2026 10:15:51 -0400Re: [RFC PATCH v1 0/5] hw/gpio: STM32F1xx GPIO controller in Rust
Wed, 12 Aug 2026 21:53:55 +0800Re: [PATCH 00/26] hw/riscv: Restore Microchip PolarFire SoC Icicle Kit firmware boot
Wed, 12 Aug 2026 20:34:50 +0800Re: [PATCH 0/7] target/arm: Introduce cpu types max-v8 and max-v9
Wed, 12 Aug 2026 12:15:58 +0100Re: [PATCH 7/7] target/arm: Separate cpu types max-v8 and max-v9
Wed, 12 Aug 2026 11:48:57 +0100Re: [PATCH 0/7] target/arm: Introduce cpu types max-v8 and max-v9
Wed, 12 Aug 2026 11:27:05 +0100Re: [PATCH v3 0/2] hw/arm/raspi4b: fix guest RAM capped at ~1 GiB regardless of machine size
Wed, 12 Aug 2026 11:24:51 +0100Re: [RFC PATCH v1 5/5] rust/hw/gpio: add native unit tests
Wed, 12 Aug 2026 14:31:59 +0800[PATCH 01/10] hw/arm: fsl-imx6ul: Add SCU compatibility window
Wed, 12 Aug 2026 09:36:04 +0800[PATCH 10/10] tests/functional/arm: Add MCIMX6UL-EVK boot tests
Wed, 12 Aug 2026 09:36:13 +0800[PATCH 03/10] hw/arm: fsl-imx6ul: Map early firmware register placeholders
Wed, 12 Aug 2026 09:36:06 +0800[PATCH 04/10] hw/arm: fsl-imx6ul: Add a minimal MMDC geometry model
Wed, 12 Aug 2026 09:36:07 +0800[PATCH 02/10] hw/misc: imx6ul_ccm: Update PMU_MISC0 reset value
Wed, 12 Aug 2026 09:36:05 +0800[PATCH 00/10] hw/arm: Enable U-Boot boot on MCIMX6UL-EVK
Wed, 12 Aug 2026 09:36:03 +0800Re: [PATCH 0/8] hw/cpu: Slightly sanitize CPU API
Tue, 11 Aug 2026 16:33:57 -0700[PATCH v2 1/3] tcg: Export tcg_gen_ussub_i{32,64,tl}
Tue, 11 Aug 2026 12:15:38 -0700[PATCH v2 2/3] target/arm: Fix SVE2 WHILEWR/WHILERW zero diff boundary case
Tue, 11 Aug 2026 12:15:39 -0700[PATCH v2 3/3] tests/tcg/aarch64: Add regression test for whilewr/whilerw
Tue, 11 Aug 2026 12:15:40 -0700[PATCH v2 0/3] target/arm: Fix SVE2 WHILEWR/WHILERW zero diff boundary case
Tue, 11 Aug 2026 12:15:37 -0700[PATCH 3/8] hw/cpu: Move internal declarations to new 'cpu-internal.h' header
Tue, 11 Aug 2026 20:34:05 +0200[PATCH 5/8] hw/cpu: Rename cpu_exec_realizefn() -> cpu_common_realize()
Tue, 11 Aug 2026 20:34:07 +0200[PATCH 8/8] hw/cpu: Move system-specific cpu_exec_realize() to cpu-system.c
Tue, 11 Aug 2026 20:34:10 +0200[PATCH 1/8] hw/cpu: Correct CPU_GET_CLASS() comment
Tue, 11 Aug 2026 20:34:03 +0200[PATCH 4/8] hw/cpu: Rename cpu_common_realizefn() -> cpu_exec_realize()
Tue, 11 Aug 2026 20:34:06 +0200[PATCH 7/8] hw/cpu: Extract cpu_exec_realize() out of cpu_common_realizefn()
Tue, 11 Aug 2026 20:34:09 +0200[PATCH 6/8] hw/cpu: Rename cpu_exec_unrealizefn() -> cpu_common_unrealize()
Tue, 11 Aug 2026 20:34:08 +0200[PATCH 2/8] hw/cpu: Include missing 'qemu/accel.h' header
Tue, 11 Aug 2026 20:34:04 +0200[PATCH 0/8] hw/cpu: Slightly sanitize CPU API
Tue, 11 Aug 2026 20:34:02 +0200[PULL 57/83] hw/arm: catalina: model PCA9555 IO expanders with their own type
Tue, 11 Aug 2026 18:29:12 +0200Re: [PATCH] hw/char/pl011: support backend hotswap
Mon, 10 Aug 2026 15:58:21 +0100Re: [PATCH 00/11] tcg: Add revbit opcodes
Mon, 10 Aug 2026 12:46:23 +0200RE: [PATCH v2 13/17] hw/misc/aspeed_hace: Support 64-bit DMA for the crypto command
Mon, 10 Aug 2026 07:04:47 +0000RE: [PATCH v2 15/17] hw/misc/aspeed_hace: Enable the crypto command on the AST2700
Mon, 10 Aug 2026 07:01:13 +0000RE: [PATCH v2 02/17] tests/qtest/aspeed-hace: Test the crypto command on the AST2500
Mon, 10 Aug 2026 07:00:10 +0000RE: [PATCH v2 06/17] tests/qtest/aspeed-hace: Test the crypto command on the AST1030
Mon, 10 Aug 2026 07:00:45 +0000RE: [PATCH v2 01/17] hw/misc/aspeed_hace: Support the crypto command in direct access mode
Mon, 10 Aug 2026 06:59:24 +0000Re: [PATCH v2 6/8] ufs: Refactor common core out of the PCI implementation
Fri, 7 Aug 2026 19:40:39 +0900[PATCH v4 10/11] Add functional and unit tests for the vm-launch-update device
Fri, 7 Aug 2026 10:55:52 +0530Re: [PATCH 4/7] target/arm: Sink aarch64_aa32_a57_init into aarch64_max_tcg_initfn
Thu, 6 Aug 2026 19:57:39 +0200Re: [PATCH 1/7] target/arm: Tidy cpu_max_initfn
Thu, 6 Aug 2026 19:56:50 +0200Re: [PATCH 2/7] target/arm: Pass ARMCPU to aarch64_aa32_a57_init
Thu, 6 Aug 2026 19:53:49 +0200Re: [PATCH 6/7] target/arm: Use -cpu max-v8 with aarch64=off
Thu, 6 Aug 2026 19:52:38 +0200Re: [PATCH 5/7] target/arm: Introduce cpu types max-v8 and max-v9
Thu, 6 Aug 2026 19:51:57 +0200Re: [PATCH 3/7] target/arm: Pass aarch64_enabled to aarch64_aa32_a57_init
Thu, 6 Aug 2026 19:51:33 +0200[PATCH v2 3/6] target/arm: Implement HCR_EL2.TID3 trap on undefined TID3 registers
Thu, 6 Aug 2026 10:31:20 -0700[PATCH v2 4/6] target/arm: Implement SCR_EL3.TID3
Thu, 6 Aug 2026 10:31:21 -0700[PATCH v2 5/6] target/arm: Implement SCR_EL3.TID5
Thu, 6 Aug 2026 10:31:22 -0700[PATCH v2 0/6] target/arm: Implement FEAT_IDTE3
Thu, 6 Aug 2026 10:31:17 -0700[PATCH v2 6/6] target/arm: Enable FEAT_IDTE3 for -cpu max
Thu, 6 Aug 2026 10:31:23 -0700[PATCH v2 1/6] target/arm: Rename isar_feature_aa64_idst
Thu, 6 Aug 2026 10:31:18 -0700[PATCH v2 2/6] target/arm: Enable writes to SCR_EL3.TID{3,5}
Thu, 6 Aug 2026 10:31:19 -0700[PATCH v2 4/6] target/arm: Implement FGWTE3 traps
Thu, 6 Aug 2026 10:27:07 -0700[PATCH v2 6/6] target/arm: Enable FEAT_FGWTE3 for -cpu max
Thu, 6 Aug 2026 10:27:09 -0700[PATCH v2 5/6] target/arm: Set fgt in cpregs for FGWTE3
Thu, 6 Aug 2026 10:27:08 -0700[PATCH v2 1/6] target/arm: Add FGWTE3_EL3
Thu, 6 Aug 2026 10:27:04 -0700[PATCH v2 2/6] target/arm: Add FGWTE3_EL3 bit definitions
Thu, 6 Aug 2026 10:27:05 -0700[PATCH v2 3/6] target/arm: Add FGWTE3 FGT bit definitions
Thu, 6 Aug 2026 10:27:06 -0700[PATCH v2 0/6] target/arm: Implement FEAT_FGWTE3
Thu, 6 Aug 2026 10:27:03 -0700Re: [PATCH 7/7] target/arm: Separate cpu types max-v8 and max-v9
Thu, 6 Aug 2026 10:04:13 -0700Re: [PATCH v2 00/17] Support the ASPEED HACE crypto command
Thu, 6 Aug 2026 19:00:47 +0200[PATCH 5/7] target/arm: Introduce cpu types max-v8 and max-v9
Thu, 6 Aug 2026 09:39:37 -0700[PATCH 7/7] target/arm: Separate cpu types max-v8 and max-v9
Thu, 6 Aug 2026 09:39:39 -0700[PATCH 4/7] target/arm: Sink aarch64_aa32_a57_init into aarch64_max_tcg_initfn
Thu, 6 Aug 2026 09:39:36 -0700[PATCH 0/7] target/arm: Introduce cpu types max-v8 and max-v9
Thu, 6 Aug 2026 09:39:32 -0700[PATCH 2/7] target/arm: Pass ARMCPU to aarch64_aa32_a57_init
Thu, 6 Aug 2026 09:39:34 -0700[PATCH 1/7] target/arm: Tidy cpu_max_initfn
Thu, 6 Aug 2026 09:39:33 -0700[PATCH 6/7] target/arm: Use -cpu max-v8 with aarch64=off
Thu, 6 Aug 2026 09:39:38 -0700[PATCH 3/7] target/arm: Pass aarch64_enabled to aarch64_aa32_a57_init
Thu, 6 Aug 2026 09:39:35 -0700Re: [PATCH] hw/arm/aspeed: avoid sign mismatch on sscanf for uart property
Thu, 6 Aug 2026 14:59:46 +0200Re: [PATCH v1 0/8] tests/functional/arm/test_aspeed: Update ASPEED SDK v11.03
Thu, 6 Aug 2026 14:52:50 +0200[PATCH] target/arm: Fix SVE2 WHILEWR/WHILERW zero diff boundary case
Thu, 6 Aug 2026 15:47:38 +0800 (CST)
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